diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa index 89e48f03a4..9adc5ee9de 100644 --- a/src/arch/sparc/isa/base.isa +++ b/src/arch/sparc/isa/base.isa @@ -121,19 +121,15 @@ output exec {{ /// Check "FP enabled" machine status bit. Called when executing any FP /// instruction. /// @retval Full-system mode: NoFault if FP is enabled, FpDisabled - /// if not. Non-full-system mode: always returns NoFault. + /// if not. static inline Fault checkFpEnableFault(ExecContext *xc) { - if (FullSystem) { - PSTATE pstate = xc->readMiscReg(MISCREG_PSTATE); - if (pstate.pef && xc->readMiscReg(MISCREG_FPRS) & 0x4) { - return NoFault; - } else { - return std::make_shared(); - } - } else { + PSTATE pstate = xc->readMiscReg(MISCREG_PSTATE); + if (pstate.pef && xc->readMiscReg(MISCREG_FPRS) & 0x4) { return NoFault; + } else { + return std::make_shared(); } } }}; diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index e774b95809..2ae9d4aa1b 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -102,6 +102,9 @@ SparcProcess::initState() // Set the MMU Primary Context Register to hold the process' pid tc->setMiscReg(MISCREG_MMU_P_CONTEXT, _pid); + // Enable floating point. + tc->setMiscReg(MISCREG_FPRS, 0x4); + /* * T1 specific registers */ @@ -117,6 +120,7 @@ Sparc32Process::initState() ThreadContext *tc = system->threads[contextIds[0]]; // The process runs in user mode with 32 bit addresses PSTATE pstate = 0; + pstate.pef = 1; pstate.ie = 1; pstate.am = 1; tc->setMiscReg(MISCREG_PSTATE, pstate); @@ -132,6 +136,7 @@ Sparc64Process::initState() ThreadContext *tc = system->threads[contextIds[0]]; // The process runs in user mode PSTATE pstate = 0; + pstate.pef = 1; pstate.ie = 1; tc->setMiscReg(MISCREG_PSTATE, pstate);