SimpleDRAM: A basic SimpleDRAM regression

--HG--
rename : tests/configs/tgen-simple-mem.py => tests/configs/tgen-simple-dram.py
rename : tests/quick/se/70.tgen/tgen-simple-mem.cfg => tests/quick/se/70.tgen/tgen-simple-dram.cfg
rename : tests/quick/se/70.tgen/tgen-simple-mem.trc => tests/quick/se/70.tgen/tgen-simple-dram.trc
This commit is contained in:
Andreas Hansson
2012-09-21 11:48:14 -04:00
parent 3b6a143ec5
commit 6427342318
7 changed files with 638 additions and 1 deletions

View File

@@ -315,7 +315,8 @@ if env['TARGET_ISA'] == 'x86':
configs += ['simple-atomic', 'simple-timing', 'o3-timing', 'memtest',
'simple-atomic-mp', 'simple-timing-mp', 'o3-timing-mp',
'inorder-timing', 'rubytest', 'tgen-simple-mem']
'inorder-timing', 'rubytest', 'tgen-simple-mem',
'tgen-simple-dram']
if env['PROTOCOL'] != 'None':
if env['PROTOCOL'] == 'MI_example':