diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index acda552d9e..17f93c8829 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -513,7 +513,7 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
             // calling changeStatus() and changing it to "bad addr write"
             // or something.
             if (traceData) {
-                traceData->setData(data);
+                traceData->setData(gtoh(data));
             }
             return fault;
         }
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index f398365d37..a8f86f8d27 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -564,7 +564,7 @@ TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
     assert(split_addr <= addr || split_addr - addr < block_size);
 
     T *dataP = new T;
-    *dataP = TheISA::gtoh(data);
+    *dataP = TheISA::htog(data);
     _status = DTBWaitResponse;
     if (split_addr > addr) {
         RequestPtr req1, req2;