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O3: Remove hardcoded tgts_per_mshr in O3CPU.py.

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There are two lines in O3CPU.py that set the dcache and icache
tgts_per_mshr to 20, ignoring any pre-configured value of tgts_per_mshr.
This patch removes these hardcoded lines from O3CPU.py and sets the default
L1 cache mshr targets to 20.

--HG--
extra : rebase_source : 6f92d950e90496a3102967442814e97dc84db08b
This commit is contained in:
Chander Sudanthi
2011-12-01 00:15:22 -08:00
parent fa753c1454
commit 61c14da751
9 changed files with 8 additions and 11 deletions
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4
src/cpu/o3/O3CPU.py
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@@ -146,7 +146,3 @@ class DerivO3CPU(BaseCPU):
smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
def addPrivateSplitL1Caches(self, ic, dc, iwc = None, dwc = None):
BaseCPU.addPrivateSplitL1Caches(self, ic, dc, iwc, dwc)
self.icache.tgts_per_mshr = 20
self.dcache.tgts_per_mshr = 20