diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 9b1cde31f5..9b0b9577c3 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -2354,14 +2354,14 @@ void
 ISA::serialize(CheckpointOut &cp) const
 {
     DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
-    SERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
+    SERIALIZE_MAPPING(miscRegs, miscRegName, NUM_PHYS_MISCREGS);
 }
 
 void
 ISA::unserialize(CheckpointIn &cp)
 {
     DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
-    UNSERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
+    UNSERIALIZE_MAPPING(miscRegs, miscRegName, NUM_PHYS_MISCREGS);
     CPSR tmp_cpsr = miscRegs[MISCREG_CPSR];
     updateRegMap(tmp_cpsr);
 }