diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 5308efaaef..6a6bca4fe2 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -1610,7 +1610,8 @@ output decoder {{
 }};
 
 def format HwMoveIPR(code) {{
-    iop = InstObjParams(name, Name, 'HwMoveIPR', CodeBlock(code))
+    iop = InstObjParams(name, Name, 'HwMoveIPR', CodeBlock(code),
+			['IprAccessOp'])
     header_output = BasicDeclare.subst(iop)
     decoder_output = BasicConstructor.subst(iop)
     decode_block = BasicDecode.subst(iop)
diff --git a/cpu/full_cpu/op_class.hh b/cpu/full_cpu/op_class.hh
index a14ccfaed4..8e85e8d8a4 100644
--- a/cpu/full_cpu/op_class.hh
+++ b/cpu/full_cpu/op_class.hh
@@ -51,6 +51,7 @@ enum OpClass {
     FloatSqrtOp,	/* floating point square root */
     MemReadOp,		/* memory read port */
     MemWriteOp,		/* memory write port */
+    IprAccessOp,	/* Internal Processor Register read/write port */
     InstPrefetchOp,	/* instruction prefetch port (on I-cache) */
     Num_OpClasses	/* total functional unit classes */
 };