From 58935cd5ad2951ef7fb005735d82eab2312fe5f2 Mon Sep 17 00:00:00 2001
From: Gabe Black <gabe.black@gmail.com>
Date: Thu, 14 Oct 2021 01:29:25 -0700
Subject: [PATCH] cpu: Stop using the ThreadContext::nextInstAddr method.

The PCState already contains this information internally, and it can be
compared, printed, etc, implicitly alongside all the other info in the
PCState, everywhere this method was being used.

Change-Id: I30705f30a135d4ffbc3279c366dafb1184445c70
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52052
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---
 src/arch/arm/nativetrace.cc |  2 +-
 src/cpu/checker/cpu_impl.hh | 10 ++++------
 src/cpu/o3/iew.cc           | 15 +++++----------
 3 files changed, 10 insertions(+), 17 deletions(-)

diff --git a/src/arch/arm/nativetrace.cc b/src/arch/arm/nativetrace.cc
index 304f4f69a7..3cafcf7fe3 100644
--- a/src/arch/arm/nativetrace.cc
+++ b/src/arch/arm/nativetrace.cc
@@ -142,7 +142,7 @@ Trace::ArmNativeTrace::check(NativeTraceRecord *record)
     ThreadContext *tc = record->getThread();
     // This area is read only on the target. It can't stop there to tell us
     // what's going on, so we should skip over anything there also.
-    if (tc->nextInstAddr() > 0xffff0000)
+    if (tc->pcState().npc() > 0xffff0000)
         return;
     nState.update(this);
     mState.update(tc);
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 9d5c260d0e..436ef9615f 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -518,10 +518,9 @@ Checker<DynInstPtr>::validateExecution(const DynInstPtr &inst)
         }
     }
 
-    if (inst->nextInstAddr() != thread->nextInstAddr()) {
-        warn("%lli: Instruction next PCs do not match! Inst: %#x, "
-             "checker: %#x",
-             curTick(), inst->nextInstAddr(), thread->nextInstAddr());
+    if (inst->pcState() != thread->pcState()) {
+        warn("%lli: Instruction PCs do not match! Inst: %s, checker: %s",
+             curTick(), inst->pcState(), thread->pcState());
         handleError(inst);
     }
 
@@ -644,10 +643,9 @@ void
 Checker<DynInstPtr>::dumpAndExit(const DynInstPtr &inst)
 {
     cprintf("Error detected, instruction information:\n");
-    cprintf("PC:%s, nextPC:%#x\n[sn:%lli]\n[tid:%i]\n"
+    cprintf("PC:%s\n[sn:%lli]\n[tid:%i]\n"
             "Completed:%i\n",
             inst->pcState(),
-            inst->nextInstAddr(),
             inst->seqNum,
             inst->threadNumber,
             inst->isCompleted());
diff --git a/src/cpu/o3/iew.cc b/src/cpu/o3/iew.cc
index 79e0783f65..2795919308 100644
--- a/src/cpu/o3/iew.cc
+++ b/src/cpu/o3/iew.cc
@@ -1602,17 +1602,12 @@ IEW::checkMisprediction(const DynInstPtr& inst)
 
             DPRINTF(IEW, "[tid:%i] [sn:%llu] Execute: "
                     "Branch mispredict detected.\n",
-                    tid,inst->seqNum);
-            DPRINTF(IEW, "[tid:%i] [sn:%llu] Predicted target "
-                    "was PC:%#x, NPC:%#x\n",
-                    tid,inst->seqNum,
-                    inst->predInstAddr(), inst->predNextInstAddr());
+                    tid, inst->seqNum);
+            DPRINTF(IEW, "[tid:%i] [sn:%llu] Predicted target was PC: %s\n",
+                    tid, inst->seqNum, inst->readPredTarg());
             DPRINTF(IEW, "[tid:%i] [sn:%llu] Execute: "
-                    "Redirecting fetch to PC: %#x, "
-                    "NPC: %#x.\n",
-                    tid,inst->seqNum,
-                    inst->nextInstAddr(),
-                    inst->nextInstAddr());
+                    "Redirecting fetch to PC: %s\n",
+                    tid, inst->seqNum, inst->pcState());
             // If incorrect, then signal the ROB that it must be squashed.
             squashDueToBranch(inst, tid);