X86: Make APICs communicate through the memory system.

2008-10-12 13:28:54 -07:00
parent e459013182
commit 557bde43c3
12 changed files with 285 additions and 40 deletions
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -144,7 +144,8 @@ class BaseCPU(MemObject):
    if build_env['TARGET_ISA'] == 'x86' and build_env['FULL_SYSTEM']:
        _mem_ports = ["itb.walker.port",
                      "dtb.walker.port",
-                      "interrupts.pio"]
+                      "interrupts.pio",
+                      "interrupts.int_port"]

    def connectMemPorts(self, bus):
        for p in self._mem_ports: