sim: Move the BaseTLB to src/arch/generic/

The TLB-related code is generally architecture dependent and should
live in the arch directory to signify that.

--HG--
rename : src/sim/BaseTLB.py => src/arch/generic/BaseTLB.py
rename : src/sim/tlb.cc => src/arch/generic/tlb.cc
rename : src/sim/tlb.hh => src/arch/generic/tlb.hh
This commit is contained in:
Andreas Sandberg
2015-02-11 10:23:27 -05:00
parent 9e6f803254
commit 550c318490
16 changed files with 21 additions and 19 deletions

View File

@@ -30,7 +30,6 @@
Import('*')
SimObject('BaseTLB.py')
SimObject('ClockedObject.py')
SimObject('TickedObject.py')
SimObject('Root.py')
@@ -75,7 +74,6 @@ if env['TARGET_ISA'] != 'null':
Source('process.cc')
Source('pseudo_inst.cc')
Source('syscall_emul.cc')
Source('tlb.cc')
DebugFlag('Checkpoint')
DebugFlag('Config')
@@ -92,7 +90,6 @@ DebugFlag('PseudoInst')
DebugFlag('Stack')
DebugFlag('SyscallVerbose')
DebugFlag('TimeSync')
DebugFlag('TLB')
DebugFlag('Thread')
DebugFlag('Timer')
DebugFlag('VtoPhys')