sim: Move the BaseTLB to src/arch/generic/
The TLB-related code is generally architecture dependent and should live in the arch directory to signify that. --HG-- rename : src/sim/BaseTLB.py => src/arch/generic/BaseTLB.py rename : src/sim/tlb.cc => src/arch/generic/tlb.cc rename : src/sim/tlb.hh => src/arch/generic/tlb.hh
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@@ -30,7 +30,6 @@
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Import('*')
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SimObject('BaseTLB.py')
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SimObject('ClockedObject.py')
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SimObject('TickedObject.py')
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SimObject('Root.py')
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@@ -75,7 +74,6 @@ if env['TARGET_ISA'] != 'null':
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Source('process.cc')
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Source('pseudo_inst.cc')
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Source('syscall_emul.cc')
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Source('tlb.cc')
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DebugFlag('Checkpoint')
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DebugFlag('Config')
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@@ -92,7 +90,6 @@ DebugFlag('PseudoInst')
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DebugFlag('Stack')
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DebugFlag('SyscallVerbose')
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DebugFlag('TimeSync')
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DebugFlag('TLB')
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DebugFlag('Thread')
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DebugFlag('Timer')
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DebugFlag('VtoPhys')
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