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Update configuration

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This commit is contained in:
Derek Christ
2024-02-22 22:29:47 +01:00
committed by Derek Christ
parent 438d997ddb
commit 51de880666
3 changed files with 8 additions and 5 deletions
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4
configs/example/gem5_library/arm-baremetal.py
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@@ -22,8 +22,6 @@ from gem5.components.cachehierarchies.classic.no_cache import NoCache
cache_hierarchy = PrivateL1PrivateL2CacheHierarchy( cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
l1d_size="16kB", l1i_size="16kB", l2_size="256kB" l1d_size="16kB", l1i_size="16kB", l2_size="256kB"
) )
# cache_hierarchy = NoCache()
memory = DRAMSysHBM2(recordable=True) memory = DRAMSysHBM2(recordable=True)
processor = SimpleProcessor(cpu_type=CPUTypes.O3, num_cores=1, isa=ISA.ARM) processor = SimpleProcessor(cpu_type=CPUTypes.O3, num_cores=1, isa=ISA.ARM)
release = ArmDefaultRelease() release = ArmDefaultRelease()
@@ -50,7 +48,7 @@ board.m5ops_base = 0x10010000
workload = CustomWorkload( workload = CustomWorkload(
"set_baremetal_workload", "set_baremetal_workload",
{ {
"kernel": BinaryResource("pim-os"), "kernel": BinaryResource("kernels/gemv"),
}, },
) )
board.set_workload(workload) board.set_workload(workload)

7
configs/example/gem5_library/arm-hello.py
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@@ -41,6 +41,11 @@ scons build/ARM/gem5.opt
``` ```
""" """
from gem5.isas import ISA
from gem5.utils.requires import requires
from gem5.resources.resource import BinaryResource
from gem5.components.memory import SingleChannelDDR3_1600
from gem5.components.processors.cpu_types import CPUTypes
from gem5.components.boards.simple_board import SimpleBoard from gem5.components.boards.simple_board import SimpleBoard
from gem5.components.cachehierarchies.classic.no_cache import NoCache from gem5.components.cachehierarchies.classic.no_cache import NoCache
from gem5.components.memory import SingleChannelDDR3_1600 from gem5.components.memory import SingleChannelDDR3_1600
@@ -84,7 +89,7 @@ board.set_se_binary_workload(
# Any resource specified in this file will be automatically retrieved. # Any resource specified in this file will be automatically retrieved.
# At the time of writing, this file is a WIP and does not contain all # At the time of writing, this file is a WIP and does not contain all
# resources. Jira ticket: https://gem5.atlassian.net/browse/GEM5-1096 # resources. Jira ticket: https://gem5.atlassian.net/browse/GEM5-1096
obtain_resource("arm-hello64-static", resource_version="1.0.0") BinaryResource("physical")
) )
# Lastly we run the simulation. # Lastly we run the simulation.

2
ext/dramsys/SConscript
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@@ -64,7 +64,7 @@ subprocess.run(
"-DCMAKE_BUILD_TYPE=Release", "-DCMAKE_BUILD_TYPE=Release",
f"-DSCONS_SOURCE_DIR:STRING={scons_root}", f"-DSCONS_SOURCE_DIR:STRING={scons_root}",
"-DDRAMSYS_BUILD_CLI=OFF", "-DDRAMSYS_BUILD_CLI=OFF",
"-DDRAMSYS_SHARED_PIM_UNITS=OFF" "-DDRAMSYS_SHARED_PIM_UNITS=ON"
], ],
check=True check=True
) )