stdlib,dev: Fix several hardcoded RISC-V ISA strings

The "s" and "u" letters are not recognized by the Linux kernel as
RISC-V extensions [1].

[1] https://elixir.bootlin.com/linux/v6.5.7/source/arch/riscv/kernel/cpufeature.c#L170

Change-Id: I2a99557482cde6e6d6160626b3995275c41b1577
Signed-off-by: Hoa Nguyen <hn@hnpl.org>

src/python/gem5/components/boards/experimental/lupv_board.py

@@ -316,7 +316,7 @@ class LupvBoard(AbstractSystemBoard, KernelDiskWorkload):
             node.append(FdtPropertyWords("reg", state.CPUAddrCells(i)))
             node.append(FdtPropertyStrings("mmu-type", "riscv,sv48"))
             node.append(FdtPropertyStrings("status", "okay"))
-            node.append(FdtPropertyStrings("riscv,isa", "rv64imafdcsu"))
+            node.append(FdtPropertyStrings("riscv,isa", "rv64imafdc"))
             # TODO: Should probably get this from the core.
             freq = self.clk_domain.clock[0].frequency
             node.appendCompatible(["riscv"])