MIPS is back to compiling and building now!

arch/alpha/isa_traits.hh:
    used for SimpleCPU instead of explicitly calling the namespace we declare in isa_traits.hhs
    so other archs. can use SimpleCPU
arch/mips/SConscript:
    dont include common_syscall or tru64
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
    Change Faults to new format
arch/mips/isa/decoder.isa:
    Fix readMiscReg access
    Made change so that you cant explicitly tell if a instruction nop,ehb,or ssnop... These are all variants
    of the sll instruction so I may need to make a separte class of instructions to handle thse better
arch/mips/isa/includes.isa:
    add isa_traits.hh and MipsISA included into every auto-gen file
arch/mips/isa_traits.cc:
    create copyMiscRegs function...
    delete useless code
arch/mips/isa_traits.hh:
    clean up for build
arch/mips/linux_process.cc:
    mem is now getMemPort(), linux process objects now take in a system argument
arch/mips/linux_process.hh:
    new argument for linux process
arch/mips/process.cc:
    add system
arch/mips/process.hh:
    add system variable
cpu/cpu_exec_context.cc:
    Change AlphaISA to TheISA
cpu/exec_context.hh:
    add readNextNPC and setNextNPC functions
cpu/simple/cpu.cc:
    include isa_traits for namespace declariation
cpu/simple/cpu.hh:
    PC & NPC access/modify functions
arch/mips/utility.hh:
    file needed for compile

--HG--
extra : convert_revision : 29a327e79c51c6174a6e526aa68c7aab7e7eb535

cpu/cpu_exec_context.cc

@@ -270,12 +270,12 @@ void
 CPUExecContext::copyArchRegs(ExecContext *xc)
 {
     // First loop through the integer registers.
-    for (int i = 0; i < AlphaISA::NumIntRegs; ++i) {
+    for (int i = 0; i < TheISA::NumIntRegs; ++i) {
         setIntReg(i, xc->readIntReg(i));
     }
 
     // Then loop through the floating point registers.
-    for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) {
+    for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
         setFloatRegDouble(i, xc->readFloatRegDouble(i));
         setFloatRegInt(i, xc->readFloatRegInt(i));
     }
@@ -286,5 +286,6 @@ CPUExecContext::copyArchRegs(ExecContext *xc)
     // Lastly copy PC/NPC
     setPC(xc->readPC());
     setNextPC(xc->readNextPC());
+    setNextNPC(xc->readNextNPC());
 }
 

cpu/exec_context.hh

@@ -189,6 +189,10 @@ class ExecContext
 
     virtual void setNextPC(uint64_t val) = 0;
 
+    virtual uint64_t readNextNPC() = 0;
+
+    virtual void setNextNPC(uint64_t val) = 0;
+
     virtual MiscReg readMiscReg(int misc_reg) = 0;
 
     virtual MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault) = 0;
@@ -362,6 +366,10 @@ class ProxyExecContext : public ExecContext
 
     void setNextPC(uint64_t val) { actualXC->setNextPC(val); }
 
+    uint64_t readNextNPC() { return actualXC->readNextNPC(); }
+
+    void setNextNPC(uint64_t val) { actualXC->setNextNPC(val); }
+
     MiscReg readMiscReg(int misc_reg)
     { return actualXC->readMiscReg(misc_reg); }
 

cpu/simple/cpu.cc

@@ -75,9 +75,11 @@
 #endif // FULL_SYSTEM
 
 using namespace std;
-//The SimpleCPU does alpha only
-using namespace AlphaISA;
 
+//The SimpleCPU does alpha only
+//Change this to include arch/isa_traits.hh?
+//using namespace AlphaISA;
+#include "arch/isa_traits.hh"
 
 SimpleCPU::TickEvent::TickEvent(SimpleCPU *c, int w)
     : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c), width(w)

cpu/simple/cpu.hh

@@ -364,7 +364,12 @@ class SimpleCPU : public BaseCPU
     }
 
     uint64_t readPC() { return cpuXC->readPC(); }
+    uint64_t readNextPC() { return cpuXC->readNextPC(); }
+    uint64_t readNextNPC() { return cpuXC->readNextNPC(); }
+
+    void setPC(uint64_t val) { cpuXC->setPC(val); }
     void setNextPC(uint64_t val) { cpuXC->setNextPC(val); }
+    void setNextNPC(uint64_t val) { cpuXC->setNextNPC(val); }
 
     MiscReg readMiscReg(int misc_reg)
     {