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ARM: Decode 16 bit thumb register addressed memory instructions.

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This commit is contained in:
Gabe Black
2010-06-02 12:58:01 -05:00
parent 462cf6f49b
commit 4bbd73649d
2 changed files with 41 additions and 10 deletions
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11
src/arch/arm/isa/decoder/thumb.isa
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@@ -90,16 +90,7 @@
0xe, 0xf: WarnUnimpl::blx(); //register
}
0x2, 0x3: WarnUnimpl::ldr();
default: decode TOPCODE_11_9 {
0x0: WarnUnimpl::str(); //register
0x1: WarnUnimpl::strh(); //register
0x2: WarnUnimpl::strb(); //register
0x3: WarnUnimpl::ldrsb(); //register
0x4: WarnUnimpl::ldr(); //register
0x5: WarnUnimpl::ldrh(); //register
0x6: WarnUnimpl::ldrb(); //register
0x7: WarnUnimpl::ldrsh(); //register
}
default: Thumb16MemReg::thumb16MemReg();
}
0x3: decode TOPCODE_12_11 {
0x0: WarnUnimpl::str(); //immediate, thumb