From 4b2118ed4bcc86eefe53ffd717743488a7851bfa Mon Sep 17 00:00:00 2001 From: "Daniel R. Carvalho" Date: Sun, 21 Mar 2021 18:07:29 -0300 Subject: [PATCH] misc: Remove sim/cur_tick dependency from sim/core.hh Remove this unnecessary dependency. Fixed all incorrect includes of sim/core.hh. Change-Id: I3ae282dbaeb45fbf4630237a3ab9b1a593ffbe0c Signed-off-by: Daniel R. Carvalho Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43592 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- ext/sst/gem5.cc | 2 +- src/arch/arm/fastmodel/CortexA76/cortex_a76.cc | 1 - src/arch/arm/fastmodel/CortexR52/cortex_r52.cc | 1 - src/arch/arm/linux/fs_workload.hh | 1 - src/arch/arm/semihosting.hh | 1 + src/arch/arm/tracers/tarmac_parser.cc | 2 +- src/arch/riscv/isa.cc | 1 - src/arch/x86/regs/int.hh | 1 - src/base/pollevent.cc | 1 - src/base/pollevent.hh | 1 - src/base/stats/storage.hh | 3 +-- src/base/trace.hh | 2 +- src/base/vnc/vncserver.cc | 1 - src/cpu/inst_pb_trace.cc | 1 + src/cpu/o3/cpu.cc | 2 +- src/cpu/pc_event.cc | 2 +- src/cpu/testers/traffic_gen/trace_gen.cc | 2 ++ src/dev/arm/generic_timer.cc | 2 ++ src/dev/arm/generic_timer.hh | 1 - src/dev/intel_8254_timer.cc | 2 ++ src/dev/net/dist_etherlink.cc | 2 +- src/dev/net/dist_iface.cc | 1 + src/dev/net/dist_iface.hh | 1 - src/dev/net/etherbus.cc | 2 +- src/dev/net/etherdump.cc | 1 + src/dev/net/etherlink.cc | 2 +- src/dev/net/etherswitch.cc | 1 + src/dev/net/ethertap.cc | 2 ++ src/dev/net/tcp_iface.cc | 1 - src/dev/pci/device.cc | 1 - src/dev/storage/ide_disk.cc | 2 +- src/dev/virtio/fs9p.cc | 1 + src/kern/freebsd/events.cc | 1 + src/mem/cache/base.cc | 2 +- src/mem/cache/cache_blk.hh | 2 +- src/mem/cache/mshr.cc | 1 - src/mem/cache/mshr.hh | 2 +- src/mem/cache/queue.hh | 2 +- src/mem/cache/replacement_policies/bip_rp.cc | 2 +- src/mem/cache/replacement_policies/fifo_rp.cc | 2 +- src/mem/cache/replacement_policies/lru_rp.cc | 2 +- src/mem/cache/replacement_policies/mru_rp.cc | 2 +- src/mem/cache/replacement_policies/weighted_lru_rp.cc | 2 +- src/mem/cache/write_queue_entry.hh | 1 - src/mem/comm_monitor.cc | 2 ++ src/mem/mem_checker.cc | 1 + src/mem/mem_checker.hh | 1 - src/mem/packet.hh | 1 - src/mem/probes/mem_trace.cc | 2 ++ src/mem/request.hh | 2 +- src/mem/ruby/profiler/StoreTrace.cc | 2 +- src/mem/ruby/structures/BankedArray.cc | 1 + src/mem/ruby/structures/BankedArray.hh | 1 - src/python/pybind11/core.cc | 1 + src/sim/core.hh | 3 --- src/sim/eventq.cc | 1 - src/sim/eventq.hh | 2 +- src/sim/global_event.cc | 2 +- src/sim/init.cc | 1 - src/sim/init_signals.cc | 1 - src/sim/power_state.cc | 1 + src/sim/power_state.hh | 1 - src/sim/root.cc | 2 ++ src/sim/stat_control.hh | 2 +- src/systemc/channel/sc_clock.cc | 1 - src/systemc/core/event.cc | 1 - src/systemc/core/sc_main.cc | 1 - src/systemc/core/scheduler.hh | 1 - src/systemc/tlm_bridge/tlm_to_gem5.cc | 1 + src/systemc/utils/tracefile.cc | 1 - src/systemc/utils/vcd.cc | 1 + util/systemc/gem5_within_systemc/sc_module.cc | 1 + 72 files changed, 52 insertions(+), 54 deletions(-) diff --git a/ext/sst/gem5.cc b/ext/sst/gem5.cc index efe73ebd01..304956760a 100644 --- a/ext/sst/gem5.cc +++ b/ext/sst/gem5.cc @@ -52,7 +52,7 @@ #include // gem5 Headers -#include +#include #include #include #include diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc index 5f7562ea7f..e9b468de28 100644 --- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc +++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc @@ -31,7 +31,6 @@ #include "arch/arm/regs/misc.hh" #include "base/logging.hh" #include "dev/arm/base_gic.hh" -#include "sim/core.hh" #include "systemc/tlm_bridge/gem5_to_tlm.hh" namespace gem5 diff --git a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc index 1ab1b2937a..4f14e7ef33 100644 --- a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc +++ b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc @@ -30,7 +30,6 @@ #include "arch/arm/fastmodel/iris/cpu.hh" #include "base/logging.hh" #include "dev/arm/base_gic.hh" -#include "sim/core.hh" #include "systemc/tlm_bridge/gem5_to_tlm.hh" namespace gem5 diff --git a/src/arch/arm/linux/fs_workload.hh b/src/arch/arm/linux/fs_workload.hh index 3531ea9f0a..659de9de91 100644 --- a/src/arch/arm/linux/fs_workload.hh +++ b/src/arch/arm/linux/fs_workload.hh @@ -52,7 +52,6 @@ #include "base/output.hh" #include "kern/linux/events.hh" #include "params/ArmFsLinux.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh index 2c237cad91..a21852d3df 100644 --- a/src/arch/arm/semihosting.hh +++ b/src/arch/arm/semihosting.hh @@ -49,6 +49,7 @@ #include "arch/arm/utility.hh" #include "cpu/thread_context.hh" #include "mem/port_proxy.hh" +#include "sim/core.hh" #include "sim/guest_abi.hh" #include "sim/sim_object.hh" diff --git a/src/arch/arm/tracers/tarmac_parser.cc b/src/arch/arm/tracers/tarmac_parser.cc index 52b95582dd..f262c6c830 100644 --- a/src/arch/arm/tracers/tarmac_parser.cc +++ b/src/arch/arm/tracers/tarmac_parser.cc @@ -49,7 +49,7 @@ #include "cpu/thread_context.hh" #include "mem/packet.hh" #include "mem/port_proxy.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/faults.hh" #include "sim/sim_exit.hh" diff --git a/src/arch/riscv/isa.cc b/src/arch/riscv/isa.cc index 162d956176..fc994eda30 100644 --- a/src/arch/riscv/isa.cc +++ b/src/arch/riscv/isa.cc @@ -47,7 +47,6 @@ #include "debug/Checkpoint.hh" #include "debug/RiscvMisc.hh" #include "params/RiscvISA.hh" -#include "sim/core.hh" #include "sim/pseudo_inst.hh" namespace gem5 diff --git a/src/arch/x86/regs/int.hh b/src/arch/x86/regs/int.hh index 37bbe93f17..014f5a4889 100644 --- a/src/arch/x86/regs/int.hh +++ b/src/arch/x86/regs/int.hh @@ -41,7 +41,6 @@ #include "arch/x86/x86_traits.hh" #include "base/bitunion.hh" #include "base/logging.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/base/pollevent.cc b/src/base/pollevent.cc index a18a5b73ee..8bd97c635a 100644 --- a/src/base/pollevent.cc +++ b/src/base/pollevent.cc @@ -46,7 +46,6 @@ #include "base/logging.hh" #include "base/types.hh" #include "sim/async.hh" -#include "sim/core.hh" #include "sim/eventq.hh" #include "sim/serialize.hh" diff --git a/src/base/pollevent.hh b/src/base/pollevent.hh index d4f80e3d7f..1e1985399b 100644 --- a/src/base/pollevent.hh +++ b/src/base/pollevent.hh @@ -33,7 +33,6 @@ #include -#include "sim/core.hh" #include "sim/serialize.hh" namespace gem5 diff --git a/src/base/stats/storage.hh b/src/base/stats/storage.hh index d0c60a1751..22c9ca459a 100644 --- a/src/base/stats/storage.hh +++ b/src/base/stats/storage.hh @@ -38,8 +38,7 @@ #include "base/logging.hh" #include "base/stats/info.hh" #include "base/stats/types.hh" -// For curTick(). -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/base/trace.hh b/src/base/trace.hh index a69eda5d52..cbdbd0bf49 100644 --- a/src/base/trace.hh +++ b/src/base/trace.hh @@ -41,7 +41,7 @@ #include "base/debug.hh" #include "base/match.hh" #include "base/types.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" // Return the global context name "global". This function gets called when // the DPRINTF macros are used in a context without a visible name() function diff --git a/src/base/vnc/vncserver.cc b/src/base/vnc/vncserver.cc index 41aafe56cf..26ddb52063 100644 --- a/src/base/vnc/vncserver.cc +++ b/src/base/vnc/vncserver.cc @@ -67,7 +67,6 @@ #include "base/trace.hh" #include "debug/VNC.hh" #include "sim/byteswap.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/cpu/inst_pb_trace.cc b/src/cpu/inst_pb_trace.cc index e6b58fa22d..0a34cd2bbb 100644 --- a/src/cpu/inst_pb_trace.cc +++ b/src/cpu/inst_pb_trace.cc @@ -46,6 +46,7 @@ #include "params/InstPBTrace.hh" #include "proto/inst.pb.h" #include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 1c6a9f3077..fbdfcbd281 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -55,7 +55,7 @@ #include "debug/O3CPU.hh" #include "debug/Quiesce.hh" #include "enums/MemoryMode.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/full_system.hh" #include "sim/process.hh" #include "sim/stat_control.hh" diff --git a/src/cpu/pc_event.cc b/src/cpu/pc_event.cc index 2e66ecc2db..e797849f83 100644 --- a/src/cpu/pc_event.cc +++ b/src/cpu/pc_event.cc @@ -35,7 +35,7 @@ #include "base/debug.hh" #include "base/trace.hh" #include "debug/PCEvent.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/system.hh" namespace gem5 diff --git a/src/cpu/testers/traffic_gen/trace_gen.cc b/src/cpu/testers/traffic_gen/trace_gen.cc index 813a4b52cd..7d8fed90e7 100644 --- a/src/cpu/testers/traffic_gen/trace_gen.cc +++ b/src/cpu/testers/traffic_gen/trace_gen.cc @@ -43,6 +43,8 @@ #include "base/trace.hh" #include "debug/TrafficGen.hh" #include "proto/packet.pb.h" +#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/dev/arm/generic_timer.cc b/src/dev/arm/generic_timer.cc index c2e5635f95..52f41fe18d 100644 --- a/src/dev/arm/generic_timer.cc +++ b/src/dev/arm/generic_timer.cc @@ -51,6 +51,8 @@ #include "params/GenericTimerFrame.hh" #include "params/GenericTimerMem.hh" #include "params/SystemCounter.hh" +#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/dev/arm/generic_timer.hh b/src/dev/arm/generic_timer.hh index d654c3ec72..9cccef6d7e 100644 --- a/src/dev/arm/generic_timer.hh +++ b/src/dev/arm/generic_timer.hh @@ -48,7 +48,6 @@ #include "base/types.hh" #include "dev/arm/base_gic.hh" #include "dev/arm/generic_timer_miscregs_types.hh" -#include "sim/core.hh" #include "sim/drain.hh" #include "sim/eventq.hh" #include "sim/serialize.hh" diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc index 85818a3f8b..c0fc773834 100644 --- a/src/dev/intel_8254_timer.cc +++ b/src/dev/intel_8254_timer.cc @@ -30,6 +30,8 @@ #include "base/logging.hh" #include "debug/Intel8254Timer.hh" +#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/dev/net/dist_etherlink.cc b/src/dev/net/dist_etherlink.cc index 4bb8221a7a..13deca42e4 100644 --- a/src/dev/net/dist_etherlink.cc +++ b/src/dev/net/dist_etherlink.cc @@ -62,7 +62,7 @@ #include "dev/net/etherpkt.hh" #include "dev/net/tcp_iface.hh" #include "params/EtherLink.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/serialize.hh" #include "sim/system.hh" diff --git a/src/dev/net/dist_iface.cc b/src/dev/net/dist_iface.cc index ac3f1fe2bc..6a44eba2f5 100644 --- a/src/dev/net/dist_iface.cc +++ b/src/dev/net/dist_iface.cc @@ -50,6 +50,7 @@ #include "debug/DistEthernet.hh" #include "debug/DistEthernetPkt.hh" #include "dev/net/etherpkt.hh" +#include "sim/cur_tick.hh" #include "sim/sim_exit.hh" #include "sim/sim_object.hh" #include "sim/system.hh" diff --git a/src/dev/net/dist_iface.hh b/src/dev/net/dist_iface.hh index 7383019ca6..3d6243e65f 100644 --- a/src/dev/net/dist_iface.hh +++ b/src/dev/net/dist_iface.hh @@ -84,7 +84,6 @@ #include "base/logging.hh" #include "dev/net/dist_packet.hh" #include "dev/net/etherpkt.hh" -#include "sim/core.hh" #include "sim/drain.hh" #include "sim/global_event.hh" #include "sim/serialize.hh" diff --git a/src/dev/net/etherbus.cc b/src/dev/net/etherbus.cc index 1a56a56abf..b1659765cf 100644 --- a/src/dev/net/etherbus.cc +++ b/src/dev/net/etherbus.cc @@ -44,7 +44,7 @@ #include "dev/net/etherint.hh" #include "dev/net/etherpkt.hh" #include "params/EtherBus.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/dev/net/etherdump.cc b/src/dev/net/etherdump.cc index 435d978794..2195d8e605 100644 --- a/src/dev/net/etherdump.cc +++ b/src/dev/net/etherdump.cc @@ -39,6 +39,7 @@ #include "base/logging.hh" #include "base/output.hh" #include "sim/core.hh" +#include "sim/cur_tick.hh" using std::string; diff --git a/src/dev/net/etherlink.cc b/src/dev/net/etherlink.cc index 67b0dd3505..46608ac9a4 100644 --- a/src/dev/net/etherlink.cc +++ b/src/dev/net/etherlink.cc @@ -59,7 +59,7 @@ #include "dev/net/etherint.hh" #include "dev/net/etherpkt.hh" #include "params/EtherLink.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/serialize.hh" #include "sim/system.hh" diff --git a/src/dev/net/etherswitch.cc b/src/dev/net/etherswitch.cc index 934e5d0ff8..a148b756f6 100644 --- a/src/dev/net/etherswitch.cc +++ b/src/dev/net/etherswitch.cc @@ -36,6 +36,7 @@ #include "base/trace.hh" #include "debug/EthernetAll.hh" #include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/dev/net/ethertap.cc b/src/dev/net/ethertap.cc index f0b77f9850..979b03ee15 100644 --- a/src/dev/net/ethertap.cc +++ b/src/dev/net/ethertap.cc @@ -66,6 +66,8 @@ #include "dev/net/etherdump.hh" #include "dev/net/etherint.hh" #include "dev/net/etherpkt.hh" +#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/dev/net/tcp_iface.cc b/src/dev/net/tcp_iface.cc index 944b73cc99..013e92d310 100644 --- a/src/dev/net/tcp_iface.cc +++ b/src/dev/net/tcp_iface.cc @@ -57,7 +57,6 @@ #include "base/types.hh" #include "debug/DistEthernet.hh" #include "debug/DistEthernetCmd.hh" -#include "sim/core.hh" #include "sim/sim_exit.hh" #if defined(__FreeBSD__) diff --git a/src/dev/pci/device.cc b/src/dev/pci/device.cc index e3d5bd8214..35a4d4fc3f 100644 --- a/src/dev/pci/device.cc +++ b/src/dev/pci/device.cc @@ -57,7 +57,6 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" #include "sim/byteswap.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/dev/storage/ide_disk.cc b/src/dev/storage/ide_disk.cc index fbbcfa498e..4c4e75b619 100644 --- a/src/dev/storage/ide_disk.cc +++ b/src/dev/storage/ide_disk.cc @@ -56,7 +56,7 @@ #include "debug/IdeDisk.hh" #include "dev/storage/disk_image.hh" #include "dev/storage/ide_ctrl.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/sim_object.hh" namespace gem5 diff --git a/src/dev/virtio/fs9p.cc b/src/dev/virtio/fs9p.cc index 737ea98c1c..dc893f6b8d 100644 --- a/src/dev/virtio/fs9p.cc +++ b/src/dev/virtio/fs9p.cc @@ -58,6 +58,7 @@ #include "params/VirtIO9PDiod.hh" #include "params/VirtIO9PProxy.hh" #include "params/VirtIO9PSocket.hh" +#include "sim/core.hh" #include "sim/system.hh" namespace gem5 diff --git a/src/kern/freebsd/events.cc b/src/kern/freebsd/events.cc index 1523227035..ce2291ed0c 100644 --- a/src/kern/freebsd/events.cc +++ b/src/kern/freebsd/events.cc @@ -38,6 +38,7 @@ #include "cpu/thread_context.hh" #include "debug/DebugPrintf.hh" #include "kern/system_events.hh" +#include "sim/core.hh" #include "sim/system.hh" namespace gem5 diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc index 61396f00ab..236f4e7f0e 100644 --- a/src/mem/cache/base.cc +++ b/src/mem/cache/base.cc @@ -60,7 +60,7 @@ #include "mem/cache/tags/super_blk.hh" #include "params/BaseCache.hh" #include "params/WriteAllocator.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/cache_blk.hh b/src/mem/cache/cache_blk.hh index d28d7e3f32..bac0c8a42f 100644 --- a/src/mem/cache/cache_blk.hh +++ b/src/mem/cache/cache_blk.hh @@ -57,7 +57,7 @@ #include "mem/cache/tags/tagged_entry.hh" #include "mem/packet.hh" #include "mem/request.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc index 44b98c20be..6aaaf9ea28 100644 --- a/src/mem/cache/mshr.cc +++ b/src/mem/cache/mshr.cc @@ -55,7 +55,6 @@ #include "debug/MSHR.hh" #include "mem/cache/base.hh" #include "mem/request.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/mem/cache/mshr.hh b/src/mem/cache/mshr.hh index 0b7c5a6c7b..a9deec66bf 100644 --- a/src/mem/cache/mshr.hh +++ b/src/mem/cache/mshr.hh @@ -59,7 +59,7 @@ #include "mem/cache/queue_entry.hh" #include "mem/packet.hh" #include "mem/request.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/queue.hh b/src/mem/cache/queue.hh index 3b6bab6171..cdfbdd6747 100644 --- a/src/mem/cache/queue.hh +++ b/src/mem/cache/queue.hh @@ -56,7 +56,7 @@ #include "debug/Drain.hh" #include "mem/cache/queue_entry.hh" #include "mem/packet.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/drain.hh" namespace gem5 diff --git a/src/mem/cache/replacement_policies/bip_rp.cc b/src/mem/cache/replacement_policies/bip_rp.cc index f7c8cb218a..102037ddfa 100644 --- a/src/mem/cache/replacement_policies/bip_rp.cc +++ b/src/mem/cache/replacement_policies/bip_rp.cc @@ -32,7 +32,7 @@ #include "base/random.hh" #include "params/BIPRP.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/replacement_policies/fifo_rp.cc b/src/mem/cache/replacement_policies/fifo_rp.cc index e1907d38e6..9655c96fa7 100644 --- a/src/mem/cache/replacement_policies/fifo_rp.cc +++ b/src/mem/cache/replacement_policies/fifo_rp.cc @@ -32,7 +32,7 @@ #include #include "params/FIFORP.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/replacement_policies/lru_rp.cc b/src/mem/cache/replacement_policies/lru_rp.cc index 3d6a11b9ad..c22f3fe2ba 100644 --- a/src/mem/cache/replacement_policies/lru_rp.cc +++ b/src/mem/cache/replacement_policies/lru_rp.cc @@ -32,7 +32,7 @@ #include #include "params/LRURP.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/replacement_policies/mru_rp.cc b/src/mem/cache/replacement_policies/mru_rp.cc index 96791cdbb2..18b0d65e89 100644 --- a/src/mem/cache/replacement_policies/mru_rp.cc +++ b/src/mem/cache/replacement_policies/mru_rp.cc @@ -32,7 +32,7 @@ #include #include "params/MRURP.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/replacement_policies/weighted_lru_rp.cc b/src/mem/cache/replacement_policies/weighted_lru_rp.cc index 40e1979dab..8b10a98de4 100644 --- a/src/mem/cache/replacement_policies/weighted_lru_rp.cc +++ b/src/mem/cache/replacement_policies/weighted_lru_rp.cc @@ -36,7 +36,7 @@ #include #include "params/WeightedLRURP.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/cache/write_queue_entry.hh b/src/mem/cache/write_queue_entry.hh index 480b7cd2b1..e9b1f7a5eb 100644 --- a/src/mem/cache/write_queue_entry.hh +++ b/src/mem/cache/write_queue_entry.hh @@ -55,7 +55,6 @@ #include "base/types.hh" #include "mem/cache/queue_entry.hh" #include "mem/packet.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/mem/comm_monitor.cc b/src/mem/comm_monitor.cc index ccc3d1ec24..a6ac574e54 100644 --- a/src/mem/comm_monitor.cc +++ b/src/mem/comm_monitor.cc @@ -41,6 +41,8 @@ #include "base/trace.hh" #include "debug/CommMonitor.hh" +#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/stats.hh" namespace gem5 diff --git a/src/mem/mem_checker.cc b/src/mem/mem_checker.cc index 8fc95e3ef1..d8a3ee9090 100644 --- a/src/mem/mem_checker.cc +++ b/src/mem/mem_checker.cc @@ -38,6 +38,7 @@ #include "mem/mem_checker.hh" #include "base/logging.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/mem_checker.hh b/src/mem/mem_checker.hh index ae5e447be1..ea5d81b180 100644 --- a/src/mem/mem_checker.hh +++ b/src/mem/mem_checker.hh @@ -52,7 +52,6 @@ #include "base/types.hh" #include "debug/MemChecker.hh" #include "params/MemChecker.hh" -#include "sim/core.hh" #include "sim/sim_object.hh" namespace gem5 diff --git a/src/mem/packet.hh b/src/mem/packet.hh index 7ae6626e45..928a7dd784 100644 --- a/src/mem/packet.hh +++ b/src/mem/packet.hh @@ -62,7 +62,6 @@ #include "mem/htm.hh" #include "mem/request.hh" #include "sim/byteswap.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/mem/probes/mem_trace.cc b/src/mem/probes/mem_trace.cc index 35a3557a3a..a470d70291 100644 --- a/src/mem/probes/mem_trace.cc +++ b/src/mem/probes/mem_trace.cc @@ -41,6 +41,8 @@ #include "base/output.hh" #include "params/MemTraceProbe.hh" #include "proto/packet.pb.h" +#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/system.hh" namespace gem5 diff --git a/src/mem/request.hh b/src/mem/request.hh index b61f6cd834..f6c975ac1b 100644 --- a/src/mem/request.hh +++ b/src/mem/request.hh @@ -62,7 +62,7 @@ #include "base/types.hh" #include "cpu/inst_seq.hh" #include "mem/htm.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/ruby/profiler/StoreTrace.cc b/src/mem/ruby/profiler/StoreTrace.cc index 625d618469..3c181875a0 100644 --- a/src/mem/ruby/profiler/StoreTrace.cc +++ b/src/mem/ruby/profiler/StoreTrace.cc @@ -28,7 +28,7 @@ #include "mem/ruby/profiler/StoreTrace.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/ruby/structures/BankedArray.cc b/src/mem/ruby/structures/BankedArray.cc index c925967ec7..146973ffb3 100644 --- a/src/mem/ruby/structures/BankedArray.cc +++ b/src/mem/ruby/structures/BankedArray.cc @@ -33,6 +33,7 @@ #include "base/intmath.hh" #include "mem/ruby/system/RubySystem.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/mem/ruby/structures/BankedArray.hh b/src/mem/ruby/structures/BankedArray.hh index c5687bbc7a..30bd6b47e1 100644 --- a/src/mem/ruby/structures/BankedArray.hh +++ b/src/mem/ruby/structures/BankedArray.hh @@ -36,7 +36,6 @@ #include "mem/ruby/common/TypeDefines.hh" #include "mem/ruby/system/RubySystem.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/python/pybind11/core.cc b/src/python/pybind11/core.cc index 48878ca3e8..0e9c31110f 100644 --- a/src/python/pybind11/core.cc +++ b/src/python/pybind11/core.cc @@ -55,6 +55,7 @@ #include "base/temperature.hh" #include "base/types.hh" #include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/drain.hh" #include "sim/serialize.hh" #include "sim/sim_object.hh" diff --git a/src/sim/core.hh b/src/sim/core.hh index 02ff137b03..bd432c2d21 100644 --- a/src/sim/core.hh +++ b/src/sim/core.hh @@ -40,9 +40,6 @@ #include "base/compiler.hh" #include "base/types.hh" -// @todo The next include is not needed in this file, but must be kept -// until the transitive includes are fixed -#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/sim/eventq.cc b/src/sim/eventq.cc index 4d93adc2bc..7afafa557e 100644 --- a/src/sim/eventq.cc +++ b/src/sim/eventq.cc @@ -41,7 +41,6 @@ #include "base/trace.hh" #include "cpu/smt.hh" #include "debug/Checkpoint.hh" -#include "sim/core.hh" namespace gem5 { diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh index b996281de3..3e146e3a21 100644 --- a/src/sim/eventq.hh +++ b/src/sim/eventq.hh @@ -49,7 +49,7 @@ #include "base/types.hh" #include "base/uncontended_mutex.hh" #include "debug/Event.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/serialize.hh" namespace gem5 diff --git a/src/sim/global_event.cc b/src/sim/global_event.cc index 700d2c834f..4dcc72cffd 100644 --- a/src/sim/global_event.cc +++ b/src/sim/global_event.cc @@ -29,7 +29,7 @@ #include "sim/global_event.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/sim/init.cc b/src/sim/init.cc index 8b3d46da2f..f9ab8b2997 100644 --- a/src/sim/init.cc +++ b/src/sim/init.cc @@ -58,7 +58,6 @@ #include "config/have_protobuf.hh" #include "python/pybind11/pybind.hh" #include "sim/async.hh" -#include "sim/core.hh" #if HAVE_PROTOBUF #include diff --git a/src/sim/init_signals.cc b/src/sim/init_signals.cc index 803d7e27f6..cac0190e95 100644 --- a/src/sim/init_signals.cc +++ b/src/sim/init_signals.cc @@ -58,7 +58,6 @@ #include "base/logging.hh" #include "sim/async.hh" #include "sim/backtrace.hh" -#include "sim/core.hh" #include "sim/eventq.hh" namespace gem5 diff --git a/src/sim/power_state.cc b/src/sim/power_state.cc index 3e20c69d8d..a8932a7a2e 100644 --- a/src/sim/power_state.cc +++ b/src/sim/power_state.cc @@ -42,6 +42,7 @@ #include "base/logging.hh" #include "base/trace.hh" #include "debug/PowerDomain.hh" +#include "sim/cur_tick.hh" #include "sim/power_domain.hh" #include "sim/serialize.hh" diff --git a/src/sim/power_state.hh b/src/sim/power_state.hh index 03f3a60343..99c34d280a 100644 --- a/src/sim/power_state.hh +++ b/src/sim/power_state.hh @@ -50,7 +50,6 @@ #include "base/statistics.hh" #include "enums/PwrState.hh" #include "params/PowerState.hh" -#include "sim/core.hh" #include "sim/sim_object.hh" namespace gem5 diff --git a/src/sim/root.cc b/src/sim/root.cc index 7fe1159123..ef35ed9fae 100644 --- a/src/sim/root.cc +++ b/src/sim/root.cc @@ -44,6 +44,8 @@ #include "base/trace.hh" #include "config/the_isa.hh" #include "debug/TimeSync.hh" +#include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/eventq.hh" #include "sim/full_system.hh" #include "sim/root.hh" diff --git a/src/sim/stat_control.hh b/src/sim/stat_control.hh index 20b967ceee..22d3134370 100644 --- a/src/sim/stat_control.hh +++ b/src/sim/stat_control.hh @@ -43,7 +43,7 @@ #include "base/compiler.hh" #include "base/types.hh" -#include "sim/core.hh" +#include "sim/cur_tick.hh" namespace gem5 { diff --git a/src/systemc/channel/sc_clock.cc b/src/systemc/channel/sc_clock.cc index bf48b828ce..03c49d000f 100644 --- a/src/systemc/channel/sc_clock.cc +++ b/src/systemc/channel/sc_clock.cc @@ -27,7 +27,6 @@ #include "base/logging.hh" #include "base/types.hh" -#include "sim/core.hh" #include "sim/eventq.hh" #include "systemc/core/kernel.hh" #include "systemc/core/process_types.hh" diff --git a/src/systemc/core/event.cc b/src/systemc/core/event.cc index 928996d824..69a3392595 100644 --- a/src/systemc/core/event.cc +++ b/src/systemc/core/event.cc @@ -31,7 +31,6 @@ #include #include -#include "sim/core.hh" #include "systemc/core/module.hh" #include "systemc/core/scheduler.hh" #include "systemc/ext/core/messages.hh" diff --git a/src/systemc/core/sc_main.cc b/src/systemc/core/sc_main.cc index d95b1b96f9..ab48f98fb3 100644 --- a/src/systemc/core/sc_main.cc +++ b/src/systemc/core/sc_main.cc @@ -26,7 +26,6 @@ */ #include "base/types.hh" -#include "sim/core.hh" #include "sim/eventq.hh" #include "systemc/core/kernel.hh" #include "systemc/core/sc_main_fiber.hh" diff --git a/src/systemc/core/scheduler.hh b/src/systemc/core/scheduler.hh index c73a6f1073..6eabb5606c 100644 --- a/src/systemc/core/scheduler.hh +++ b/src/systemc/core/scheduler.hh @@ -37,7 +37,6 @@ #include #include "base/logging.hh" -#include "sim/core.hh" #include "sim/eventq.hh" #include "systemc/core/channel.hh" #include "systemc/core/list.hh" diff --git a/src/systemc/tlm_bridge/tlm_to_gem5.cc b/src/systemc/tlm_bridge/tlm_to_gem5.cc index 3095fd3aba..2b9ced8783 100644 --- a/src/systemc/tlm_bridge/tlm_to_gem5.cc +++ b/src/systemc/tlm_bridge/tlm_to_gem5.cc @@ -64,6 +64,7 @@ #include "params/TlmToGem5Bridge128.hh" #include "params/TlmToGem5Bridge256.hh" #include "params/TlmToGem5Bridge512.hh" +#include "sim/core.hh" #include "sim/system.hh" #include "systemc/ext/core/sc_module_name.hh" #include "systemc/ext/core/sc_time.hh" diff --git a/src/systemc/utils/tracefile.cc b/src/systemc/utils/tracefile.cc index 2a74459216..a6cf9523a5 100644 --- a/src/systemc/utils/tracefile.cc +++ b/src/systemc/utils/tracefile.cc @@ -30,7 +30,6 @@ #include #include -#include "sim/core.hh" #include "systemc/core/time.hh" #include "systemc/ext/core/sc_main.hh" #include "systemc/ext/core/sc_time.hh" diff --git a/src/systemc/utils/vcd.cc b/src/systemc/utils/vcd.cc index 9cf0bac202..ff1879203f 100644 --- a/src/systemc/utils/vcd.cc +++ b/src/systemc/utils/vcd.cc @@ -32,6 +32,7 @@ #include "base/bitfield.hh" #include "base/cprintf.hh" +#include "sim/core.hh" #include "systemc/core/scheduler.hh" #include "systemc/ext/core/sc_event.hh" #include "systemc/ext/core/sc_main.hh" diff --git a/util/systemc/gem5_within_systemc/sc_module.cc b/util/systemc/gem5_within_systemc/sc_module.cc index dcd61c75a6..ae27b51155 100644 --- a/util/systemc/gem5_within_systemc/sc_module.cc +++ b/util/systemc/gem5_within_systemc/sc_module.cc @@ -61,6 +61,7 @@ #include "sc_module.hh" #include "sim/async.hh" #include "sim/core.hh" +#include "sim/cur_tick.hh" #include "sim/eventq.hh" #include "sim/sim_exit.hh" #include "sim/stat_control.hh"