diff --git a/src/arch/x86/X86ISA.py b/src/arch/x86/X86ISA.py index d73d99a041..1503f5fa68 100644 --- a/src/arch/x86/X86ISA.py +++ b/src/arch/x86/X86ISA.py @@ -34,8 +34,12 @@ # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. from m5.objects.BaseISA import BaseISA +from m5.params import * class X86ISA(BaseISA): type = 'X86ISA' cxx_class = 'X86ISA::ISA' cxx_header = "arch/x86/isa.hh" + + vendor_string = Param.String("M5 Simulator", + "Vendor string for CPUID instruction") diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc index 64d4544f8c..8c9f29cef9 100644 --- a/src/arch/x86/cpuid.cc +++ b/src/arch/x86/cpuid.cc @@ -28,6 +28,7 @@ #include "arch/x86/cpuid.hh" +#include "arch/x86/isa.hh" #include "base/bitfield.hh" #include "cpu/thread_context.hh" @@ -67,8 +68,6 @@ namespace X86ISA { NumExtendedCpuidFuncs }; - static const int vendorStringSize = 13; - static const char vendorString[vendorStringSize] = "M5 Simulator"; static const int nameStringSize = 48; static const char nameString[nameStringSize] = "Fake M5 x86_64 CPU"; @@ -93,12 +92,15 @@ namespace X86ISA { // The extended functions switch (funcNum) { case VendorAndLargestExtFunc: - assert(vendorStringSize >= 12); - result = CpuidResult( - 0x80000000 + NumExtendedCpuidFuncs - 1, - stringToRegister(vendorString), - stringToRegister(vendorString + 4), - stringToRegister(vendorString + 8)); + { + ISA *isa = dynamic_cast(tc->getIsaPtr()); + const char *vendor_string = isa->getVendorString().c_str(); + result = CpuidResult( + 0x80000000 + NumExtendedCpuidFuncs - 1, + stringToRegister(vendor_string), + stringToRegister(vendor_string + 4), + stringToRegister(vendor_string + 8)); + } break; case FamilyModelSteppingBrandFeatures: result = CpuidResult(0x00020f51, 0x00000405, @@ -151,12 +153,15 @@ namespace X86ISA { // The standard functions switch (funcNum) { case VendorAndLargestStdFunc: - assert(vendorStringSize >= 12); - result = CpuidResult( - NumStandardCpuidFuncs - 1, - stringToRegister(vendorString), - stringToRegister(vendorString + 4), - stringToRegister(vendorString + 8)); + { + ISA *isa = dynamic_cast(tc->getIsaPtr()); + const char *vendor_string = isa->getVendorString().c_str(); + result = CpuidResult( + NumExtendedCpuidFuncs - 1, + stringToRegister(vendor_string), + stringToRegister(vendor_string + 4), + stringToRegister(vendor_string + 8)); + } break; case FamilyModelStepping: result = CpuidResult(0x00020f51, 0x00000805, diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc index e4e526e096..2465a19d2a 100644 --- a/src/arch/x86/isa.cc +++ b/src/arch/x86/isa.cc @@ -130,8 +130,10 @@ ISA::clear() regVal[MISCREG_APIC_BASE] = lApicBase; } -ISA::ISA(const Params &p) : BaseISA(p) +ISA::ISA(const X86ISAParams &p) : BaseISA(p), vendorString(p.vendor_string) { + fatal_if(vendorString.size() != 12, + "CPUID vendor string must be 12 characters\n"); clear(); } @@ -434,4 +436,10 @@ ISA::setThreadContext(ThreadContext *_tc) tc->getDecoderPtr()->setM5Reg(regVal[MISCREG_M5_REG]); } +std::string +ISA::getVendorString() const +{ + return vendorString; +} + } diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh index 3df7cce925..2cbce6e891 100644 --- a/src/arch/x86/isa.hh +++ b/src/arch/x86/isa.hh @@ -108,6 +108,11 @@ namespace X86ISA void unserialize(CheckpointIn &cp) override; void setThreadContext(ThreadContext *_tc) override; + + std::string getVendorString() const; + + private: + std::string vendorString; }; }