misc: Fix coding style for class-opening braces

The systemc dir was not included in this fix.

First it was identified that there were only occurrences
at 0, 1, and 2 levels of indentation, using:

    grep -nrE --exclude-dir=systemc \
        "^ *class [A-Za-z].* {$" src/

Then the following commands were run to replace:

<indent level>class X ... {

by:

<indent level>class X ...
<indent level>{

Level 0:
    grep -nrl --exclude-dir=systemc
        "^class [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^class ([A-Za-z].*) \{$/class \1\n\{/g'

Level 1:
    grep -nrl --exclude-dir=systemc \
        "^    class [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^    class ([A-Za-z].*) \{$/    class \1\n    \{/g'

and so on.

Change-Id: I17615ce16a333d69867b27c7bae0f4fdafd8b2eb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39015
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/dev/hsa/hsa_driver.hh

@@ -79,7 +79,8 @@ class HSADriver : public EmulatedDriver
         HSADriver *driver;
         ThreadContext *tc;
     };
-    class EventTableEntry {
+    class EventTableEntry
+    {
       public:
         EventTableEntry() :
             mailBoxPtr(0), tc(nullptr), threadWaiting(false), setEvent(false)
@@ -118,7 +119,8 @@ class HSADriver : public EmulatedDriver
     // reset all events when one of those events wake up this thread. The
     // signal events that can wake up this thread are stored in signalEvents
     // whereas the timer wakeup event is stored in timerEvent.
-    class EventList {
+    class EventList
+    {
       public:
         EventList() : driver(nullptr), timerEvent(nullptr, nullptr) {}
         EventList(HSADriver *hsa_driver, ThreadContext *thrd_cntxt)

src/dev/hsa/hsa_packet_processor.hh

@@ -69,7 +69,8 @@ class HSADevice;
 class HWScheduler;
 
 // Our internal representation of an HSA queue
-class HSAQueueDescriptor {
+class HSAQueueDescriptor
+{
     public:
         uint64_t     basePointer;
         uint64_t     doorbellPointer;

src/dev/riscv/clint.hh

@@ -100,8 +100,8 @@ class Clint : public BasicPioDevice
      * ...:             reserved[1]
      * 0xBFF8:          mtime (read-only)
      */
-    class ClintRegisters: public RegisterBankLE {
-
+    class ClintRegisters: public RegisterBankLE
+    {
       public:
         const Addr mtimecmpStart = 0x4000;
         const Addr mtimeStart = 0xBFF8;

src/dev/riscv/hifive.hh

@@ -44,7 +44,9 @@
 #include "params/HiFive.hh"
 
 using namespace RiscvISA;
-class HiFive : public Platform {
+
+class HiFive : public Platform
+{
   public:
     System *system;
     Clint *clint;

src/dev/riscv/plic.hh

@@ -182,7 +182,8 @@ class Plic : public BasicPioDevice
      *
      * ... reserved[3]
      */
-    class PlicRegisters: public RegisterBankLE {
+    class PlicRegisters: public RegisterBankLE
+    {
       public:
         const Addr pendingStart = 0x1000;
         const Addr enableStart = 0x2000;

src/dev/storage/ide_disk.hh

@@ -72,7 +72,8 @@ typedef struct PrdEntry {
     uint16_t endOfTable;
 } PrdEntry_t;
 
-class PrdTableEntry {
+class PrdTableEntry
+{
   public:
     PrdEntry_t entry;
 

src/dev/virtio/base.hh

@@ -292,8 +292,9 @@ class VirtDescriptor
  * @note Queues must be registered with
  * VirtIODeviceBase::registerQueue() to be active.
  */
-class VirtQueue : public Serializable {
-public:
+class VirtQueue : public Serializable
+{
+  public:
     virtual ~VirtQueue() {};
 
     /** @{