diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 828c2b4cab..ccb467394d 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -363,8 +363,8 @@ class OzoneCPU : public BaseCPU
 
     bool interval_stats;
 
-    AlphaITB *itb;
-    AlphaDTB *dtb;
+    TheISA::ITB *itb;
+    TheISA::DTB *dtb;
     System *system;
     PhysicalMemory *physmem;
 #endif
diff --git a/src/cpu/ozone/thread_state.hh b/src/cpu/ozone/thread_state.hh
index c4d16b3af9..a71795851e 100644
--- a/src/cpu/ozone/thread_state.hh
+++ b/src/cpu/ozone/thread_state.hh
@@ -122,7 +122,7 @@ struct OzoneThreadState : public ThreadState {
 
     MiscReg readMiscRegWithEffect(int misc_reg)
     {
-        return miscRegFile.readRegWithEffect(misc_reg, fault, tc);
+        return miscRegFile.readRegWithEffect(misc_reg, tc);
     }
 
     void setMiscReg(int misc_reg, const MiscReg &val)