Clock: Move the clock and related functions to ClockedObject

This patch moves the clock of the CPU, bus, and numerous devices to
the new class ClockedObject, that sits in between the SimObject and
MemObject in the class hierarchy. Although there are currently a fair
amount of MemObjects that do not make use of the clock, they
potentially should do so, e.g. the caches should at some point have
the same clock as the CPU, potentially with a 1:n ratio. This patch
does not introduce any new clock objects or object hierarchies
(clusters, clock domains etc), but is still a step in the direction of
having a more structured approach clock domains.

The most contentious part of this patch is the serialisation of clocks
that some of the modules (but not all) did previously. This
serialisation should not be needed as the clock is set through the
parameters even when restoring from the checkpoint. In other words,
the state is "stored" in the Python code that creates the modules.

The nextCycle methods are also simplified and the clock phase
parameter of the CPU is removed (this could be part of a clock object
once they are introduced).

src/dev/CopyEngine.py

@@ -52,8 +52,8 @@ class CopyEngine(PciDevice):
     ChanCnt = Param.UInt8(4, "Number of DMA channels that exist on device")
     XferCap = Param.MemorySize('4kB', "Number of bits of transfer size that are supported")
 
-
-    clock = Param.Clock('500MHz', "Clock speed of the device")
+    # Override the default clock
+    clock = '500MHz'
     latBeforeBegin = Param.Latency('20ns', "Latency after a DMA command is seen before it's proccessed")
     latAfterCompletion = Param.Latency('20ns', "Latency after a DMA command is complete before it's reported as such")
 

src/dev/Ethernet.py

@@ -79,7 +79,8 @@ class IGbE(EtherDevice):
         "Number of enteries in the rx descriptor cache")
     tx_desc_cache_size = Param.Int(64,
         "Number of enteries in the rx descriptor cache")
-    clock = Param.Clock('500MHz', "Clock speed of the device")
+    # Override the default clock
+    clock = '500MHz'
     VendorID = 0x8086
     SubsystemID = 0x1008
     SubsystemVendorID = 0x8086
@@ -127,7 +128,8 @@ class EtherDevBase(EtherDevice):
     hardware_address = Param.EthernetAddr(NextEthernetAddr,
         "Ethernet Hardware Address")
 
-    clock = Param.Clock('0ns', "State machine processor frequency")
+    # Override the default clock
+    clock = '0ns'
 
     dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
     dma_read_factor = Param.Latency('0us', "multiplier for dma reads")

src/dev/arm/RealView.py

@@ -118,7 +118,8 @@ class CpuLocalTimer(BasicPioDevice):
     gic = Param.Gic(Parent.any, "Gic to use for interrupting")
     int_num_timer = Param.UInt32("Interrrupt number used per-cpu to GIC")
     int_num_watchdog = Param.UInt32("Interrupt number for per-cpu watchdog to GIC")
-    clock = Param.Clock('1GHz', "Clock speed at which the timer counts")
+    # Override the default clock
+    clock = '1GHz'
 
 class PL031(AmbaIntDevice):
     type = 'PL031'
@@ -134,7 +135,8 @@ class Pl050(AmbaIntDevice):
 
 class Pl111(AmbaDmaDevice):
     type = 'Pl111'
-    clock = Param.Clock('24MHz', "Clock speed of the input")
+    # Override the default clock
+    clock = '24MHz'
     vnc   = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display")
     amba_id = 0x00141111
 

src/dev/arm/pl111.cc

@@ -63,7 +63,7 @@ Pl111::Pl111(const Params *p)
       lcdRis(0), lcdMis(0),
       clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
       clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
-      clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0), clock(p->clock),
+      clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
       vncserver(p->vnc), bmp(NULL), width(LcdMaxWidth), height(LcdMaxHeight),
       bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
       waterMark(0), dmaPendingNum(0), readEvent(this), fillFifoEvent(this),
@@ -512,26 +512,6 @@ Pl111::dmaDone()
         schedule(fillFifoEvent, nextCycle());
 }
 
-
-Tick
-Pl111::nextCycle()
-{
-    Tick nextTick = curTick() + clock - 1;
-    nextTick -= nextTick%clock;
-    return nextTick;
-}
-
-Tick
-Pl111::nextCycle(Tick beginTick)
-{
-    Tick nextTick = beginTick;
-    if (nextTick%clock!=0)
-        nextTick = nextTick - (nextTick%clock) + clock;
-
-    assert(nextTick >= curTick());
-    return nextTick;
-}
-
 void
 Pl111::serialize(std::ostream &os)
 {
@@ -586,7 +566,6 @@ Pl111::serialize(std::ostream &os)
     uint8_t clcdCrsrMis_serial = clcdCrsrMis;
     SERIALIZE_SCALAR(clcdCrsrMis_serial);
 
-    SERIALIZE_SCALAR(clock);
     SERIALIZE_SCALAR(height);
     SERIALIZE_SCALAR(width);
     SERIALIZE_SCALAR(bytesPerPixel);
@@ -689,7 +668,6 @@ Pl111::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(clcdCrsrMis_serial);
     clcdCrsrMis = clcdCrsrMis_serial;
 
-    UNSERIALIZE_SCALAR(clock);
     UNSERIALIZE_SCALAR(height);
     UNSERIALIZE_SCALAR(width);
     UNSERIALIZE_SCALAR(bytesPerPixel);

src/dev/arm/pl111.hh

@@ -228,9 +228,6 @@ class Pl111: public AmbaDmaDevice
     /** Cursor masked interrupt status register - const */
     InterruptReg clcdCrsrMis;
 
-    /** Clock speed */
-    Tick clock;
-
     /** VNC server */
     VncServer *vncserver;
 
@@ -291,10 +288,6 @@ class Pl111: public AmbaDmaDevice
     /** DMA done event */
     void dmaDone();
 
-    /** Next cycle event */
-    Tick nextCycle();
-    Tick nextCycle(Tick beginTick);
-
     /** DMA framebuffer read event */
     EventWrapper<Pl111, &Pl111::readFramebuffer> readEvent;
 

src/dev/arm/timer_cpulocal.cc

@@ -58,7 +58,7 @@ CpuLocalTimer::CpuLocalTimer(Params *p)
         localTimer[i].parent = this;
         localTimer[i].intNumTimer = p->int_num_timer;
         localTimer[i].intNumWatchdog = p->int_num_watchdog;
-        localTimer[i].clock = p->clock;
+        localTimer[i].clock = clock;
         localTimer[i].cpuNum = i;
     }
     pioSize = 0x38;
@@ -339,7 +339,6 @@ CpuLocalTimer::Timer::serialize(std::ostream &os)
     DPRINTF(Checkpoint, "Serializing Arm CpuLocalTimer\n");
     SERIALIZE_SCALAR(intNumTimer);
     SERIALIZE_SCALAR(intNumWatchdog);
-    SERIALIZE_SCALAR(clock);
 
     uint32_t timer_control_serial = timerControl;
     uint32_t watchdog_control_serial = watchdogControl;
@@ -379,7 +378,6 @@ CpuLocalTimer::Timer::unserialize(Checkpoint *cp, const std::string &section)
 
     UNSERIALIZE_SCALAR(intNumTimer);
     UNSERIALIZE_SCALAR(intNumWatchdog);
-    UNSERIALIZE_SCALAR(clock);
 
     uint32_t timer_control_serial;
     UNSERIALIZE_SCALAR(timer_control_serial);

src/dev/i8254xGBe.cc

@@ -68,7 +68,7 @@ IGbE::IGbE(const Params *p)
       tadvEvent(this), tidvEvent(this), tickEvent(this), interEvent(this),
       rxDescCache(this, name()+".RxDesc", p->rx_desc_cache_size),
       txDescCache(this, name()+".TxDesc", p->tx_desc_cache_size),
-      clock(p->clock), lastInterrupt(0)
+      lastInterrupt(0)
 {
     etherInt = new IGbEInt(name() + ".int", this);
 

src/dev/i8254xGBe.hh

@@ -523,9 +523,7 @@ class IGbE : public EtherDevice
 
     virtual EtherInt *getEthPort(const std::string &if_name, int idx);
 
-    Tick clock;
     Tick lastInterrupt;
-    inline Tick ticks(int numCycles) const { return numCycles * clock; }
 
     virtual Tick read(PacketPtr pkt);
     virtual Tick write(PacketPtr pkt);

src/dev/ns_gige.cc

@@ -99,7 +99,6 @@ NSGigE::NSGigE(Params *p)
       txFifo(p->tx_fifo_size), rxFifo(p->rx_fifo_size),
       txPacket(0), rxPacket(0), txPacketBufPtr(NULL), rxPacketBufPtr(NULL),
       txXferLen(0), rxXferLen(0), rxDmaFree(false), txDmaFree(false),
-      clock(p->clock),
       txState(txIdle), txEnable(false), CTDD(false), txHalt(false),
       txFragPtr(0), txDescCnt(0), txDmaState(dmaIdle), rxState(rxIdle),
       rxEnable(false), CRDD(false), rxPktBytes(0), rxHalt(false),

src/dev/ns_gige.hh

@@ -196,10 +196,6 @@ class NSGigE : public EtherDevice
     ns_desc64 txDesc64;
     ns_desc64 rxDesc64;
 
-    /* state machine cycle time */
-    Tick clock;
-    inline Tick ticks(int numCycles) const { return numCycles * clock; }
-
     /* tx State Machine */
     TxState txState;
     bool txEnable;

src/dev/sinic.cc

@@ -78,7 +78,7 @@ const char *TxStateStrings[] =
 // Sinic PCI Device
 //
 Base::Base(const Params *p)
-    : PciDev(p), rxEnable(false), txEnable(false), clock(p->clock),
+    : PciDev(p), rxEnable(false), txEnable(false),
       intrDelay(p->intr_delay), intrTick(0), cpuIntrEnable(false),
       cpuPendingIntr(false), intrEvent(0), interface(NULL)
 {

src/dev/sinic.hh

@@ -50,8 +50,6 @@ class Base : public PciDev
   protected:
     bool rxEnable;
     bool txEnable;
-    Tick clock;
-    inline Tick ticks(int numCycles) const { return numCycles * clock; }
 
   protected:
     Tick intrDelay;