stdlib: Add PrivateL1SharedL2CacheHierarchy

This is implemented based on PrivateL1PrivateL2CacheHierarchy

Following modifications are made.

* The associativities of caches are parameterized
* Only single L2bus and L2cache exist
* Connections of L2cache (i.e., l2bus - l2cache, membus - l2cache) are
done out of for loop which is repeated num_cpus times.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1274

Change-Id: I1307954ffff4fab2bf5f61e225881b03a352a1e1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62655
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
yiwkd2
2022-08-24 03:32:45 -04:00
committed by Youngin Kim
parent 9f206c2bfc
commit 411e986a91
2 changed files with 185 additions and 0 deletions

View File

@@ -89,6 +89,9 @@ PySource('gem5.components.cachehierarchies.classic',
PySource('gem5.components.cachehierarchies.classic',
'gem5/components/cachehierarchies/classic/'
'private_l1_private_l2_cache_hierarchy.py')
PySource('gem5.components.cachehierarchies.classic',
'gem5/components/cachehierarchies/classic/'
'private_l1_shared_l2_cache_hierarchy.py')
PySource('gem5.components.cachehierarchies.classic.caches',
'gem5/components/cachehierarchies/classic/caches/__init__.py')
PySource('gem5.components.cachehierarchies.classic.caches',