From 3fc6b67974eba4c5785ab2875aae95b61a22ede1 Mon Sep 17 00:00:00 2001
From: Hoa Nguyen <hn@hnpl.org>
Date: Fri, 6 Oct 2023 00:45:21 -0700
Subject: [PATCH] arch-riscv: Add several inform() to
 RiscvISA::BootloaderKernelWorkload

Signed-off-by: Hoa Nguyen <hn@hnpl.org>
---
 src/arch/riscv/linux/fs_workload.cc | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/src/arch/riscv/linux/fs_workload.cc b/src/arch/riscv/linux/fs_workload.cc
index 0cd0e761d2..8bb35ccd17 100644
--- a/src/arch/riscv/linux/fs_workload.cc
+++ b/src/arch/riscv/linux/fs_workload.cc
@@ -118,6 +118,12 @@ BootloaderKernelWorkload::loadBootloader()
             system->physProxy
         );
         delete bootloader;
+
+        inform("Loaded bootloader \'%s\' at 0x%llx\n",
+               params().bootloader_filename,
+               bootloader_addr_offset);
+    } else {
+        inform("Bootloader is not specified.\n");
     }
 }
 
@@ -130,6 +136,12 @@ BootloaderKernelWorkload::loadKernel()
             system->physProxy
         );
         delete kernel;
+
+        inform("Loaded kernel \'%s\' at 0x%llx\n",
+                params().kernel_filename,
+                kernel_paddr_offset);
+    } else {
+        inform("Kernel is not specified.\n");
     }
 }
 
@@ -144,9 +156,15 @@ BootloaderKernelWorkload::loadDtb()
             .write(system->physProxy);
         delete dtb_file;
 
+        inform("Loaded DTB \'%s\' at 0x%llx\n",
+                params().dtb_filename,
+                params().dtb_addr);
+
         for (auto *tc: system->threads) {
             tc->setReg(int_reg::A1, params().dtb_addr);
         }
+    } else {
+        inform("DTB file is not specified.\n");
     }
 }