diff --git a/src/arch/arm/fastmodel/iris/isa.hh b/src/arch/arm/fastmodel/iris/isa.hh
index 8caa994642..f4f3b977bc 100644
--- a/src/arch/arm/fastmodel/iris/isa.hh
+++ b/src/arch/arm/fastmodel/iris/isa.hh
@@ -52,6 +52,12 @@ class ISA : public BaseISA
         ArmISA::CPSR cpsr = tc->readMiscRegNoEffect(ArmISA::MISCREG_CPSR);
         return ArmISA::inUserMode(cpsr);
     }
+
+    PCStateBase *
+    newPCState(Addr new_inst_addr=0) const override
+    {
+        return new ArmISA::PCState(new_inst_addr);
+    }
 };
 
 } // namespace Iris
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index a4758d202d..2d30ded9bb 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -43,6 +43,7 @@
 
 #include "arch/arm/isa_device.hh"
 #include "arch/arm/mmu.hh"
+#include "arch/arm/pcstate.hh"
 #include "arch/arm/regs/int.hh"
 #include "arch/arm/regs/misc.hh"
 #include "arch/arm/self_debug.hh"
@@ -868,6 +869,12 @@ namespace ArmISA
 
         void setupThreadContext();
 
+        PCStateBase *
+        newPCState(Addr new_inst_addr=0) const override
+        {
+            return new PCState(new_inst_addr);
+        }
+
         void takeOverFrom(ThreadContext *new_tc,
                           ThreadContext *old_tc) override;
 
diff --git a/src/arch/generic/isa.hh b/src/arch/generic/isa.hh
index ba047df432..a49b17a606 100644
--- a/src/arch/generic/isa.hh
+++ b/src/arch/generic/isa.hh
@@ -42,6 +42,7 @@
 
 #include <vector>
 
+#include "arch/generic/pcstate.hh"
 #include "cpu/reg_class.hh"
 #include "mem/packet.hh"
 #include "mem/request.hh"
@@ -66,6 +67,7 @@ class BaseISA : public SimObject
     RegClasses _regClasses;
 
   public:
+    virtual PCStateBase *newPCState(Addr new_inst_addr=0) const = 0;
     virtual void takeOverFrom(ThreadContext *new_tc, ThreadContext *old_tc) {}
     virtual void setThreadContext(ThreadContext *_tc) { tc = _tc; }
 
diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh
index 915039f509..c7fbac703a 100644
--- a/src/arch/mips/isa.hh
+++ b/src/arch/mips/isa.hh
@@ -34,6 +34,7 @@
 #include <vector>
 
 #include "arch/generic/isa.hh"
+#include "arch/mips/pcstate.hh"
 #include "arch/mips/regs/misc.hh"
 #include "arch/mips/types.hh"
 #include "base/types.hh"
@@ -78,6 +79,12 @@ namespace MipsISA
       public:
         void clear();
 
+        PCStateBase *
+        newPCState(Addr new_inst_addr=0) const override
+        {
+            return new PCState(new_inst_addr);
+        }
+
       public:
         void configCP();
 
diff --git a/src/arch/power/isa.hh b/src/arch/power/isa.hh
index d563ebe84e..6c42f3271e 100644
--- a/src/arch/power/isa.hh
+++ b/src/arch/power/isa.hh
@@ -32,6 +32,7 @@
 #define __ARCH_POWER_ISA_HH__
 
 #include "arch/generic/isa.hh"
+#include "arch/power/pcstate.hh"
 #include "arch/power/regs/misc.hh"
 #include "arch/power/types.hh"
 #include "base/logging.hh"
@@ -58,6 +59,12 @@ class ISA : public BaseISA
   public:
     void clear() {}
 
+    PCStateBase *
+    newPCState(Addr new_inst_addr=0) const override
+    {
+        return new PCState(new_inst_addr);
+    }
+
   public:
     RegVal
     readMiscRegNoEffect(int misc_reg) const
diff --git a/src/arch/riscv/isa.hh b/src/arch/riscv/isa.hh
index 4521c52dd1..6435b742e8 100644
--- a/src/arch/riscv/isa.hh
+++ b/src/arch/riscv/isa.hh
@@ -37,6 +37,7 @@
 #include <vector>
 
 #include "arch/generic/isa.hh"
+#include "arch/riscv/pcstate.hh"
 #include "arch/riscv/types.hh"
 #include "base/types.hh"
 
@@ -76,6 +77,12 @@ class ISA : public BaseISA
 
     void clear();
 
+    PCStateBase *
+    newPCState(Addr new_inst_addr=0) const override
+    {
+        return new PCState(new_inst_addr);
+    }
+
   public:
     RegVal readMiscRegNoEffect(int misc_reg) const;
     RegVal readMiscReg(int misc_reg);
diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh
index 4d2b15cc2e..f26de40318 100644
--- a/src/arch/sparc/isa.hh
+++ b/src/arch/sparc/isa.hh
@@ -33,6 +33,7 @@
 #include <string>
 
 #include "arch/generic/isa.hh"
+#include "arch/sparc/pcstate.hh"
 #include "arch/sparc/regs/int.hh"
 #include "arch/sparc/regs/misc.hh"
 #include "arch/sparc/sparc_traits.hh"
@@ -166,9 +167,14 @@ class ISA : public BaseISA
     void reloadRegMap();
 
   public:
-
     void clear();
 
+    PCStateBase *
+    newPCState(Addr new_inst_addr=0) const override
+    {
+        return new PCState(new_inst_addr);
+    }
+
     void serialize(CheckpointOut &cp) const override;
     void unserialize(CheckpointIn &cp) override;
 
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index eb4890c773..ee5664aa95 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -33,6 +33,7 @@
 #include <string>
 
 #include "arch/generic/isa.hh"
+#include "arch/x86/pcstate.hh"
 #include "arch/x86/regs/float.hh"
 #include "arch/x86/regs/misc.hh"
 #include "base/types.hh"
@@ -59,6 +60,12 @@ class ISA : public BaseISA
   public:
     void clear();
 
+    PCStateBase *
+    newPCState(Addr new_inst_addr=0) const override
+    {
+        return new PCState(new_inst_addr);
+    }
+
     using Params = X86ISAParams;
 
     ISA(const Params &p);