From 3e1b9dfc0f8ca9bd0e869a6f1bf04dd31f7acb18 Mon Sep 17 00:00:00 2001
From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Tue, 7 Feb 2023 15:26:47 +0000
Subject: [PATCH] arch-arm: Remove unnecessary case in ISA::readMiscReg

Change-Id: I8b95a75fbfec2626fbe8b455ae9b3f30acda538f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70564
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---
 src/arch/arm/isa.cc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index ab6e3f7273..83df61fb40 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -567,8 +567,6 @@ ISA::readMiscReg(RegIndex idx)
             l2ctlr.numCPUs = tc->getSystemPtr()->threads.size() - 1;
             return l2ctlr;
         }
-      case MISCREG_DBGDSCRint:
-        return readMiscRegNoEffect(MISCREG_DBGDSCRint);
       case MISCREG_ISR:
       case MISCREG_ISR_EL1:
         {