regress: Regression tester updates

Regression tester updates required by the following patches:

brad/moved_python_protocol_files: config: moved python protocol config files
brad/ruby_options_movement: config: reorganized how ruby specifies command-line options
brad/config_token_bcast: ruby: added token broadcast config params to cmd options
brad/topology_name: config: Added the topology description to m5 config.ini
brad/ruby_system_names: config: Improve ruby simobject names
brad/consolidated_protocol_stats: slicc: Consolidated the protocol stats printing
brad/ruby_request_type_ostream_fix: ruby: Added ruby_request_type ostream def to libruby.hh
brad/memtest_dma_extension: memtest: Memtester support for DMA
brad/token_dma_lockdown_fix: MOESI_CMP_token: Fixed dma persistent lockdown bugs
brad/profile_generic_mach_type: ruby: Reincarnated the responding machine profiling
brad/network_msg_consolidated_stats: ruby: Added consolidated network msg stats
brad/bcast_msg_profiling: ruby: Added bcast msg profiling to hammer and token
brad/l2cache_profiling_fix: ruby: Fixed L2 cache miss profiling
brad/llsc_ruby_m5_fix: ruby: fix ruby llsc support to sync sc outcomes
brad/ruby_latency_fixes: ruby: Reduced ruby latencies
brad/hammer_l2_cache_latency: ruby: Updated MOESI_hammer L2 latency behavior
brad/deterministic_resurrection: ruby: Resurrected Ruby's deterministic tests
brad/token_dma_fixes: ruby: MOESI_CMP_token dma fixes
brad/ruby_cmd_options: config: added cmd options to control ruby debug
brad/token_owner_fixes: ruby: fixed token bugs associated with owner token counts
brad/ruby_remove_try_except: ruby: Improved try except blocks in ruby creation
brad/ruby_port_callback_fix: ruby: Fixed RubyPort sendTiming callbacks
brad/interrupt_drain_fix: devices: Fixed periodic interrupts to work with draining
brad/llsc_trace_profile: ruby: Added SC fail indication to trace profiling
brad/no_migrate_atomic: ruby: Disable migratory sharing for token and hammer
brad/ruby_start_time_fix: ruby: Reset ruby stats in RubySystem unserialize
brad/numa_bit_select_fix: ruby: fixed DirectoryMemory's numa_high_bit configuration
brad/hammer_probe_filter: ruby: added probe filter support to hammer
brad/miss_latency_detail_profile: MOESI_hammer: break down miss latency stalled cycles
brad/recycle_latency_fix: ruby: Recycle latency fix for hammer
brad/stall_and_wait: ruby: Stall and wait input messages instead of recycling
brad/rubytest_request_flag_fix: ruby: Fixed minor bug in ruby test for setting the request type
brad/hammer_merge_gets: ruby: Added merge GETS optimization to hammer
brad/regress_updates: regress: Regression tester updates
This commit is contained in:
Brad Beckmann
2010-08-20 17:44:26 -07:00
parent 8557480300
commit 3d93afe348
85 changed files with 18758 additions and 22616 deletions

View File

@@ -5,10 +5,118 @@ dummy=0
[system]
type=System
children=physmem ruby
children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby
mem_mode=timing
physmem=system.physmem
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.dir_cntrl0.directory
directory_latency=6
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
to_mem_ctrl_latency=1
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=sequencer
L1DcacheMemory=system.l1_cntrl0.sequencer.dcache
L1IcacheMemory=system.l1_cntrl0.sequencer.icache
buffer_size=0
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.l1_cntrl0.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=0
[system.l1_cntrl0.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.l1_cntrl0.sequencer.dcache
deadlock_threshold=500000
icache=system.l1_cntrl0.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.l1_cntrl0.sequencer.dcache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.l2_cntrl0.L2cacheMemory
buffer_size=0
l2_request_latency=2
l2_response_latency=2
number_of_TBEs=256
recycle_latency=10
to_l1_latency=1
transitions_per_cycle=32
version=0
[system.l2_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
latency=15
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.physmem]
type=PhysicalMemory
file=
@@ -17,7 +125,7 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort
[system.ruby]
type=RubySystem
@@ -56,6 +164,7 @@ topology=system.ruby.network.topology
[system.ruby.network.topology]
type=Topology
children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2
description=Crossbar
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
num_int_nodes=4
@@ -63,136 +172,28 @@ print_config=false
[system.ruby.network.topology.ext_links0]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links0.ext_node
ext_node=system.l1_cntrl0
int_node=0
latency=1
weight=1
[system.ruby.network.topology.ext_links0.ext_node]
type=L1Cache_Controller
children=sequencer
L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
buffer_size=0
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links0.ext_node.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
deadlock_threshold=500000
icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links1]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links1.ext_node
ext_node=system.l2_cntrl0
int_node=1
latency=1
weight=1
[system.ruby.network.topology.ext_links1.ext_node]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory
buffer_size=0
l2_request_latency=2
l2_response_latency=2
number_of_TBEs=256
recycle_latency=10
to_l1_latency=1
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory]
type=RubyCache
assoc=2
latency=15
replacement_policy=PSEUDO_LRU
size=512
[system.ruby.network.topology.ext_links2]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links2.ext_node
ext_node=system.dir_cntrl0
int_node=2
latency=1
weight=1
[system.ruby.network.topology.ext_links2.ext_node]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.ruby.network.topology.ext_links2.ext_node.directory
directory_latency=6
memBuffer=system.ruby.network.topology.ext_links2.ext_node.memBuffer
number_of_TBEs=256
recycle_latency=10
to_mem_ctrl_latency=1
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links2.ext_node.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=0
size=134217728
use_map=false
version=0
[system.ruby.network.topology.ext_links2.ext_node.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.ruby.network.topology.int_links0]
type=IntLink
bw_multiplier=16

View File

@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
M5 compiled Mar 18 2010 14:36:48
M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates
M5 started Mar 18 2010 14:37:00
M5 executing on cabr0210
M5 compiled Aug 20 2010 11:26:07
M5 revision 7074a6fb3b4f 7537 default qtip tip brad/regress_updates
M5 started Aug 20 2010 11:29:00
M5 executing on SC2B0629
command line: build/ALPHA_SE_MESI_CMP_directory/m5.fast -d build/ALPHA_SE_MESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_SE_MESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 385311 because Ruby Tester completed
Exiting @ tick 362171 because Ruby Tester completed

View File

@@ -1,10 +1,10 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 208556 # Number of bytes of host memory used
host_seconds 0.90 # Real time elapsed on the host
host_tick_rate 429636 # Simulator tick rate (ticks/s)
host_mem_usage 209424 # Number of bytes of host memory used
host_seconds 0.56 # Real time elapsed on the host
host_tick_rate 645865 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.000385 # Number of seconds simulated
sim_ticks 385311 # Number of ticks simulated
sim_seconds 0.000362 # Number of seconds simulated
sim_ticks 362171 # Number of ticks simulated
---------- End Simulation Statistics ----------

View File

@@ -5,10 +5,114 @@ dummy=0
[system]
type=System
children=physmem ruby
children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby
mem_mode=timing
physmem=system.physmem
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.dir_cntrl0.directory
directory_latency=6
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=sequencer
L1DcacheMemory=system.l1_cntrl0.sequencer.dcache
L1IcacheMemory=system.l1_cntrl0.sequencer.icache
buffer_size=0
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.l1_cntrl0.sequencer.dcache
deadlock_threshold=500000
icache=system.l1_cntrl0.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.l1_cntrl0.sequencer.dcache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.l2_cntrl0.L2cacheMemory
buffer_size=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
response_latency=2
transitions_per_cycle=32
version=0
[system.l2_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
latency=15
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.physmem]
type=PhysicalMemory
file=
@@ -17,7 +121,7 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort
[system.ruby]
type=RubySystem
@@ -58,137 +162,34 @@ type=Topology
children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
name=Crossbar
num_int_nodes=4
print_config=false
[system.ruby.network.topology.ext_links0]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links0.ext_node
ext_node=system.l1_cntrl0
int_node=0
latency=1
weight=1
[system.ruby.network.topology.ext_links0.ext_node]
type=L1Cache_Controller
children=sequencer
L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
buffer_size=0
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links0.ext_node.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
deadlock_threshold=500000
icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links1]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links1.ext_node
ext_node=system.l2_cntrl0
int_node=1
latency=1
weight=1
[system.ruby.network.topology.ext_links1.ext_node]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory
buffer_size=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
response_latency=2
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory]
type=RubyCache
assoc=2
latency=15
replacement_policy=PSEUDO_LRU
size=512
[system.ruby.network.topology.ext_links2]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links2.ext_node
ext_node=system.dir_cntrl0
int_node=2
latency=1
weight=1
[system.ruby.network.topology.ext_links2.ext_node]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.ruby.network.topology.ext_links2.ext_node.directory
directory_latency=6
memBuffer=system.ruby.network.topology.ext_links2.ext_node.memBuffer
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links2.ext_node.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=0
size=134217728
use_map=false
version=0
[system.ruby.network.topology.ext_links2.ext_node.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.ruby.network.topology.int_links0]
type=IntLink
bw_multiplier=16

View File

@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
M5 compiled Mar 18 2010 14:39:50
M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates
M5 started Mar 18 2010 14:40:19
M5 executing on cabr0210
M5 compiled Aug 5 2010 10:34:54
M5 revision 1cd2a169499f+ 7535+ default brad/hammer_merge_gets qtip tip
M5 started Aug 5 2010 10:40:24
M5 executing on svvint09
command line: build/ALPHA_SE_MOESI_CMP_directory/m5.fast -d build/ALPHA_SE_MOESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_SE_MOESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 382981 because Ruby Tester completed
Exiting @ tick 372291 because Ruby Tester completed

View File

@@ -1,10 +1,10 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 208684 # Number of bytes of host memory used
host_seconds 6.96 # Real time elapsed on the host
host_tick_rate 55013 # Simulator tick rate (ticks/s)
host_mem_usage 210064 # Number of bytes of host memory used
host_seconds 0.80 # Real time elapsed on the host
host_tick_rate 465329 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.000383 # Number of seconds simulated
sim_ticks 382981 # Number of ticks simulated
sim_seconds 0.000372 # Number of seconds simulated
sim_ticks 372291 # Number of ticks simulated
---------- End Simulation Statistics ----------

View File

@@ -5,10 +5,125 @@ dummy=0
[system]
type=System
children=physmem ruby
children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby
mem_mode=timing
physmem=system.physmem
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.dir_cntrl0.directory
directory_latency=5
distributed_persistent=true
fixed_timeout_latency=100
l2_select_num_bits=0
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=sequencer
L1DcacheMemory=system.l1_cntrl0.sequencer.dcache
L1IcacheMemory=system.l1_cntrl0.sequencer.icache
N_tokens=2
buffer_size=0
dynamic_timeout_enabled=true
fixed_timeout_latency=300
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.l1_cntrl0.sequencer.dcache
deadlock_threshold=500000
icache=system.l1_cntrl0.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.l1_cntrl0.sequencer.dcache]
type=RubyCache
assoc=2
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer.icache]
type=RubyCache
assoc=2
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.l2_cntrl0.L2cacheMemory
N_tokens=2
buffer_size=0
filtering_enabled=true
l2_request_latency=5
l2_response_latency=5
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.l2_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
latency=10
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=0
[system.physmem]
type=PhysicalMemory
file=
@@ -17,7 +132,7 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort
[system.ruby]
type=RubySystem
@@ -58,147 +173,34 @@ type=Topology
children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
name=Crossbar
num_int_nodes=4
print_config=false
[system.ruby.network.topology.ext_links0]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links0.ext_node
ext_node=system.l1_cntrl0
int_node=0
latency=1
weight=1
[system.ruby.network.topology.ext_links0.ext_node]
type=L1Cache_Controller
children=sequencer
L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
N_tokens=2
buffer_size=0
dynamic_timeout_enabled=true
fixed_timeout_latency=300
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links0.ext_node.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
deadlock_threshold=500000
icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links1]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links1.ext_node
ext_node=system.l2_cntrl0
int_node=1
latency=1
weight=1
[system.ruby.network.topology.ext_links1.ext_node]
type=L2Cache_Controller
children=L2cacheMemory
L2cacheMemory=system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory
N_tokens=2
buffer_size=0
filtering_enabled=true
l2_request_latency=10
l2_response_latency=10
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory]
type=RubyCache
assoc=2
latency=15
replacement_policy=PSEUDO_LRU
size=512
[system.ruby.network.topology.ext_links2]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links2.ext_node
ext_node=system.dir_cntrl0
int_node=2
latency=1
weight=1
[system.ruby.network.topology.ext_links2.ext_node]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.ruby.network.topology.ext_links2.ext_node.directory
directory_latency=6
distributed_persistent=true
fixed_timeout_latency=300
l2_select_num_bits=0
memBuffer=system.ruby.network.topology.ext_links2.ext_node.memBuffer
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links2.ext_node.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=0
size=134217728
use_map=false
version=0
[system.ruby.network.topology.ext_links2.ext_node.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.ruby.network.topology.int_links0]
type=IntLink
bw_multiplier=16

View File

@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
M5 compiled Mar 18 2010 14:58:42
M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates
M5 started Mar 18 2010 14:58:52
M5 executing on cabr0210
M5 compiled Aug 5 2010 10:41:36
M5 revision 1cd2a169499f+ 7535+ default brad/hammer_merge_gets qtip tip
M5 started Aug 5 2010 10:45:27
M5 executing on svvint09
command line: build/ALPHA_SE_MOESI_CMP_token/m5.fast -d build/ALPHA_SE_MOESI_CMP_token/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_SE_MOESI_CMP_token/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 275491 because Ruby Tester completed
Exiting @ tick 273851 because Ruby Tester completed

View File

@@ -1,10 +1,10 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 208544 # Number of bytes of host memory used
host_mem_usage 210052 # Number of bytes of host memory used
host_seconds 0.53 # Real time elapsed on the host
host_tick_rate 518969 # Simulator tick rate (ticks/s)
host_tick_rate 516678 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.000275 # Number of seconds simulated
sim_ticks 275491 # Number of ticks simulated
sim_seconds 0.000274 # Number of seconds simulated
sim_ticks 273851 # Number of ticks simulated
---------- End Simulation Statistics ----------

View File

@@ -5,10 +5,114 @@ dummy=0
[system]
type=System
children=physmem ruby
children=dir_cntrl0 l1_cntrl0 physmem ruby
mem_mode=timing
physmem=system.physmem
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer probeFilter
buffer_size=0
directory=system.dir_cntrl0.directory
memBuffer=system.dir_cntrl0.memBuffer
memory_controller_latency=2
number_of_TBEs=256
probeFilter=system.dir_cntrl0.probeFilter
probe_filter_enabled=false
recycle_latency=10
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.dir_cntrl0.probeFilter]
type=RubyCache
assoc=4
latency=1
replacement_policy=PSEUDO_LRU
size=1024
start_index_bit=6
[system.l1_cntrl0]
type=L1Cache_Controller
children=L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.sequencer.dcache
L1IcacheMemory=system.l1_cntrl0.sequencer.icache
L2cacheMemory=system.l1_cntrl0.L2cacheMemory
buffer_size=0
cache_response_latency=10
issue_latency=2
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
latency=10
replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.l1_cntrl0.sequencer.dcache
deadlock_threshold=500000
icache=system.l1_cntrl0.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.l1_cntrl0.sequencer.dcache]
type=RubyCache
assoc=2
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer.icache]
type=RubyCache
assoc=2
latency=2
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.physmem]
type=PhysicalMemory
file=
@@ -17,7 +121,7 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort
[system.ruby]
type=RubySystem
@@ -58,117 +162,26 @@ type=Topology
children=ext_links0 ext_links1 int_links0 int_links1
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1
name=Crossbar
num_int_nodes=3
print_config=false
[system.ruby.network.topology.ext_links0]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links0.ext_node
ext_node=system.l1_cntrl0
int_node=0
latency=1
weight=1
[system.ruby.network.topology.ext_links0.ext_node]
type=L1Cache_Controller
children=L2cacheMemory sequencer
L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
L2cacheMemory=system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory
buffer_size=0
cache_response_latency=12
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory]
type=RubyCache
assoc=2
latency=15
replacement_policy=PSEUDO_LRU
size=512
[system.ruby.network.topology.ext_links0.ext_node.sequencer]
type=RubySequencer
children=dcache icache
dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
deadlock_threshold=500000
icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links1]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links1.ext_node
ext_node=system.dir_cntrl0
int_node=1
latency=1
weight=1
[system.ruby.network.topology.ext_links1.ext_node]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.ruby.network.topology.ext_links1.ext_node.directory
memBuffer=system.ruby.network.topology.ext_links1.ext_node.memBuffer
memory_controller_latency=12
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links1.ext_node.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=0
size=134217728
use_map=false
version=0
[system.ruby.network.topology.ext_links1.ext_node.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.ruby.network.topology.int_links0]
type=IntLink
bw_multiplier=16

View File

@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
M5 compiled Mar 18 2010 14:59:19
M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates
M5 started Mar 18 2010 14:59:22
M5 executing on cabr0210
M5 compiled Aug 5 2010 14:43:33
M5 revision c5f5b5533e96+ 7536+ default qtip tip brad/regress_updates
M5 started Aug 5 2010 14:46:32
M5 executing on svvint09
command line: build/ALPHA_SE_MOESI_hammer/m5.fast -d build/ALPHA_SE_MOESI_hammer/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_SE_MOESI_hammer/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 222961 because Ruby Tester completed
Exiting @ tick 213851 because Ruby Tester completed

View File

@@ -1,10 +1,10 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 208348 # Number of bytes of host memory used
host_seconds 0.53 # Real time elapsed on the host
host_tick_rate 420464 # Simulator tick rate (ticks/s)
host_mem_usage 209796 # Number of bytes of host memory used
host_seconds 0.44 # Real time elapsed on the host
host_tick_rate 485996 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.000223 # Number of seconds simulated
sim_ticks 222961 # Number of ticks simulated
sim_seconds 0.000214 # Number of seconds simulated
sim_ticks 213851 # Number of ticks simulated
---------- End Simulation Statistics ----------

View File

@@ -5,10 +5,85 @@ dummy=0
[system]
type=System
children=physmem ruby
children=dir_cntrl0 l1_cntrl0 physmem ruby
mem_mode=timing
physmem=system.physmem
[system.dir_cntrl0]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.dir_cntrl0.directory
directory_latency=12
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
size=134217728
use_map=false
version=0
[system.dir_cntrl0.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=sequencer
buffer_size=0
cacheMemory=system.l1_cntrl0.sequencer.icache
cache_response_latency=12
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
[system.l1_cntrl0.sequencer]
type=RubySequencer
children=icache
dcache=system.l1_cntrl0.sequencer.icache
deadlock_threshold=500000
icache=system.l1_cntrl0.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.l1_cntrl0.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.physmem]
type=PhysicalMemory
file=
@@ -17,7 +92,7 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort
[system.ruby]
type=RubySystem
@@ -58,101 +133,26 @@ type=Topology
children=ext_links0 ext_links1 int_links0 int_links1
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1
name=Crossbar
num_int_nodes=3
print_config=false
[system.ruby.network.topology.ext_links0]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links0.ext_node
ext_node=system.l1_cntrl0
int_node=0
latency=1
weight=1
[system.ruby.network.topology.ext_links0.ext_node]
type=L1Cache_Controller
children=sequencer
buffer_size=0
cacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
cache_response_latency=12
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links0.ext_node.sequencer]
type=RubySequencer
children=icache
dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
deadlock_threshold=500000
icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
max_outstanding_requests=16
physmem=system.physmem
using_ruby_tester=true
version=0
physMemPort=system.physmem.port[0]
port=root.cpuPort[0]
[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache]
type=RubyCache
assoc=2
latency=3
replacement_policy=PSEUDO_LRU
size=256
[system.ruby.network.topology.ext_links1]
type=ExtLink
children=ext_node
bw_multiplier=64
ext_node=system.ruby.network.topology.ext_links1.ext_node
ext_node=system.dir_cntrl0
int_node=1
latency=1
weight=1
[system.ruby.network.topology.ext_links1.ext_node]
type=Directory_Controller
children=directory memBuffer
buffer_size=0
directory=system.ruby.network.topology.ext_links1.ext_node.directory
directory_latency=12
memBuffer=system.ruby.network.topology.ext_links1.ext_node.memBuffer
number_of_TBEs=256
recycle_latency=10
transitions_per_cycle=32
version=0
[system.ruby.network.topology.ext_links1.ext_node.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=0
size=134217728
use_map=false
version=0
[system.ruby.network.topology.ext_links1.ext_node.memBuffer]
type=RubyMemoryControl
bank_bit_0=8
bank_busy_time=11
bank_queue_size=12
banks_per_rank=8
basic_bus_busy_time=2
dimm_bit_0=12
dimms_per_channel=2
mem_bus_cycle_multiplier=10
mem_ctl_latency=12
mem_fixed_delay=0
mem_random_arbitrate=0
rank_bit_0=11
rank_rank_delay=1
ranks_per_dimm=2
read_write_delay=2
refresh_period=1560
tFaw=0
version=0
[system.ruby.network.topology.int_links0]
type=IntLink
bw_multiplier=16

View File

@@ -13,7 +13,7 @@ RubySystem config:
Network Configuration
---------------------
network: SIMPLE_NETWORK
topology:
topology: Crossbar
virtual_net_0: active, ordered
virtual_net_1: active, ordered
@@ -34,27 +34,27 @@ periodic_stats_period: 1000000
================ End RubySystem Configuration Print ================
Real time: Mar/18/2010 13:52:47
Real time: Aug/05/2010 10:10:57
Profiler Stats
--------------
Elapsed_time_in_seconds: 1
Elapsed_time_in_minutes: 0.0166667
Elapsed_time_in_hours: 0.000277778
Elapsed_time_in_days: 1.15741e-05
Elapsed_time_in_seconds: 0
Elapsed_time_in_minutes: 0
Elapsed_time_in_hours: 0
Elapsed_time_in_days: 0
Virtual_time_in_seconds: 0.27
Virtual_time_in_minutes: 0.0045
Virtual_time_in_hours: 7.5e-05
Virtual_time_in_days: 3.125e-06
Virtual_time_in_seconds: 0.29
Virtual_time_in_minutes: 0.00483333
Virtual_time_in_hours: 8.05556e-05
Virtual_time_in_days: 3.35648e-06
Ruby_current_time: 281031
Ruby_start_time: 0
Ruby_cycles: 281031
mbytes_resident: 30.418
mbytes_total: 203.402
resident_ratio: 0.149584
mbytes_resident: 30.9531
mbytes_total: 203.703
resident_ratio: 0.15199
ruby_cycles_executed: [ 281032 ]
@@ -70,8 +70,27 @@ sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1014 average: 15.7801
All Non-Zero Cycle Demand Cache Accesses
----------------------------------------
miss_latency: [binsize: 32 max: 6068 count: 999 average: 4453.7 | standard deviation: 529.325 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 1 1 1 0 1 0 1 1 2 5 0 4 1 2 6 3 6 5 6 4 7 8 11 10 20 9 19 17 13 22 23 30 23 21 22 25 31 27 31 39 35 22 20 39 25 30 27 25 23 23 19 22 10 24 20 22 19 19 12 21 14 12 11 5 8 6 0 3 2 0 2 0 2 0 1 0 0 0 0 2 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ]
miss_latency_2: [binsize: 32 max: 5702 count: 100 average: 4601.67 | standard deviation: 400.66 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 0 3 1 1 3 4 5 2 3 1 2 2 1 1 5 2 0 2 2 2 5 2 2 3 1 3 3 1 5 4 4 2 3 3 1 1 3 3 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
miss_latency_3: [binsize: 32 max: 6068 count: 899 average: 4437.24 | standard deviation: 539.424 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 1 1 1 0 1 0 1 1 2 5 0 4 1 2 6 3 6 4 6 4 7 7 11 9 18 9 16 16 12 19 19 25 21 18 21 23 29 26 30 34 33 22 18 37 23 25 25 23 20 22 16 19 9 19 16 18 17 16 9 20 13 9 8 4 7 6 0 3 2 0 1 0 2 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ]
miss_latency_IFETCH: [binsize: 32 max: 5702 count: 52 average: 4674.27 | standard deviation: 454.241 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 2 0 0 1 3 4 0 0 0 0 1 0 1 1 1 0 0 1 0 1 0 2 2 0 3 2 0 3 0 3 1 3 3 1 1 3 2 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
miss_latency_LD: [binsize: 32 max: 5245 count: 48 average: 4523.02 | standard deviation: 319.516 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 2 1 1 2 3 1 2 1 1 0 4 1 0 2 1 2 4 2 0 1 1 0 1 1 2 4 1 1 0 0 0 0 0 1 0 1 ]
miss_latency_ST: [binsize: 32 max: 6068 count: 899 average: 4437.24 | standard deviation: 539.424 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 1 1 1 0 1 0 1 1 2 5 0 4 1 2 6 3 6 4 6 4 7 7 11 9 18 9 16 16 12 19 19 25 21 18 21 23 29 26 30 34 33 22 18 37 23 25 25 23 20 22 16 19 9 19 16 18 17 16 9 20 13 9 8 4 7 6 0 3 2 0 1 0 2 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ]
miss_latency_L1Cache: [binsize: 32 max: 4572 count: 43 average: 3768.3 | standard deviation: 359.401 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 2 2 0 3 1 0 2 2 1 1 3 1 2 1 1 0 4 1 3 0 2 0 0 1 0 0 0 0 0 0 0 2 0 0 0 2 ]
miss_latency_Directory: [binsize: 32 max: 6068 count: 956 average: 4484.53 | standard deviation: 514.797 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 0 1 0 2 4 1 5 4 3 3 5 7 10 10 16 8 16 17 11 22 23 29 23 21 22 25 31 27 31 37 35 22 20 37 25 30 27 25 23 23 19 22 10 24 20 22 19 19 12 21 14 12 11 5 8 6 0 3 2 0 2 0 2 0 1 0 0 0 0 2 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ]
miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_wCC_Times: 0
miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_dir_Times: 956
miss_latency_IFETCH_L1Cache: [binsize: 32 max: 4022 count: 1 average: 4022 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_IFETCH_Directory: [binsize: 32 max: 5702 count: 51 average: 4687.06 | standard deviation: 449.206 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 1 0 0 1 3 4 0 0 0 0 1 0 1 1 1 0 0 1 0 1 0 2 2 0 3 2 0 3 0 3 1 3 3 1 1 3 2 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
miss_latency_LD_L1Cache: [binsize: 32 max: 3964 count: 1 average: 3964 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
miss_latency_LD_Directory: [binsize: 32 max: 5245 count: 47 average: 4534.91 | standard deviation: 312.044 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 1 1 2 3 1 2 1 1 0 4 1 0 2 1 2 4 2 0 1 1 0 1 1 2 4 1 1 0 0 0 0 0 1 0 1 ]
miss_latency_ST_L1Cache: [binsize: 32 max: 4572 count: 41 average: 3757.34 | standard deviation: 364.607 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 2 2 0 3 1 0 2 2 1 1 3 1 2 1 1 0 3 1 2 0 2 0 0 1 0 0 0 0 0 0 0 2 0 0 0 2 ]
miss_latency_ST_Directory: [binsize: 32 max: 6068 count: 858 average: 4469.73 | standard deviation: 524.902 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 0 1 0 2 4 1 5 3 3 3 5 6 10 9 15 8 14 16 10 19 19 24 21 18 21 23 29 26 30 32 33 22 18 35 23 25 25 23 20 22 16 19 9 19 16 18 17 16 9 20 13 9 8 4 7 6 0 3 2 0 1 0 2 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ]
All Non-Zero Cycle SW Prefetch Requests
------------------------------------
@@ -103,7 +122,7 @@ Resource Usage
page_size: 4096
user_time: 0
system_time: 0
page_reclaims: 8779
page_reclaims: 9003
page_faults: 0
swaps: 0
block_inputs: 0
@@ -112,6 +131,12 @@ block_outputs: 0
Network Stats
-------------
total_msg_count_Control: 2871 22968
total_msg_count_Data: 2862 206064
total_msg_count_Response_Data: 2870 206640
total_msg_count_Writeback_Control: 2861 22888
total_msgs: 11464 total_bytes: 458560
switch_0_inlinks: 2
switch_0_outlinks: 2
links_utilized_percent_switch_0: 0.106147
@@ -145,59 +170,59 @@ links_utilized_percent_switch_2: 0.169999
outgoing_messages_switch_2_link_1_Control: 957 7656 [ 0 0 957 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Data: 954 68688 [ 0 0 954 0 0 0 0 0 0 0 ] base_latency: 1
Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 957
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 957
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0
Cache Stats: system.l1_cntrl0.sequencer.icache
system.l1_cntrl0.sequencer.icache_total_misses: 957
system.l1_cntrl0.sequencer.icache_total_demand_misses: 957
system.l1_cntrl0.sequencer.icache_total_prefetches: 0
system.l1_cntrl0.sequencer.icache_total_sw_prefetches: 0
system.l1_cntrl0.sequencer.icache_total_hw_prefetches: 0
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_LD: 10.2403%
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_ST: 89.7597%
system.l1_cntrl0.sequencer.icache_request_type_LD: 4.91118%
system.l1_cntrl0.sequencer.icache_request_type_ST: 89.7597%
system.l1_cntrl0.sequencer.icache_request_type_IFETCH: 5.32915%
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_access_mode_type_SupervisorMode: 957 100%
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 4 count: 957 average: 1.30721 | standard deviation: 0.910193 | 0 859 0 0 98 ]
system.l1_cntrl0.sequencer.icache_access_mode_type_SupervisorMode: 957 100%
--- L1Cache 0 ---
--- L1Cache ---
- Event Counts -
Load 100
Ifetch 0
Store 900
Data 956
Fwd_GETX 0
Inv 0
Replacement 954
Writeback_Ack 953
Writeback_Nack 0
Load [48 ] 48
Ifetch [52 ] 52
Store [900 ] 900
Data [956 ] 956
Fwd_GETX [0 ] 0
Inv [0 ] 0
Replacement [954 ] 954
Writeback_Ack [953 ] 953
Writeback_Nack [0 ] 0
- Transitions -
I Load 98
I Ifetch 0 <--
I Store 859
I Inv 0 <--
I Replacement 0 <--
I Load [47 ] 47
I Ifetch [51 ] 51
I Store [859 ] 859
I Inv [0 ] 0
I Replacement [0 ] 0
II Writeback_Nack 0 <--
II Writeback_Nack [0 ] 0
M Load 2
M Ifetch 0 <--
M Store 41
M Fwd_GETX 0 <--
M Inv 0 <--
M Replacement 954
M Load [1 ] 1
M Ifetch [1 ] 1
M Store [41 ] 41
M Fwd_GETX [0 ] 0
M Inv [0 ] 0
M Replacement [954 ] 954
MI Fwd_GETX 0 <--
MI Inv 0 <--
MI Writeback_Ack 953
MI Writeback_Nack 0 <--
MI Fwd_GETX [0 ] 0
MI Inv [0 ] 0
MI Writeback_Ack [953 ] 953
MI Writeback_Nack [0 ] 0
MII Fwd_GETX 0 <--
MII Fwd_GETX [0 ] 0
IS Data 98
IS Data [98 ] 98
IM Data 858
IM Data [858 ] 858
Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer:
Memory controller: system.dir_cntrl0.memBuffer:
memory_total_requests: 1911
memory_reads: 957
memory_writes: 954
@@ -217,70 +242,69 @@ Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer:
memory_stalls_for_read_read_turnaround: 112
accesses_per_bank: 52 59 44 109 131 76 66 52 64 66 66 44 56 54 54 52 52 48 76 50 48 60 56 48 50 62 66 48 36 64 48 54
--- Directory 0 ---
--- Directory ---
- Event Counts -
GETX 957
GETS 0
PUTX 954
PUTX_NotOwner 0
DMA_READ 0
DMA_WRITE 0
Memory_Data 957
Memory_Ack 954
GETX [957 ] 957
GETS [0 ] 0
PUTX [954 ] 954
PUTX_NotOwner [0 ] 0
DMA_READ [0 ] 0
DMA_WRITE [0 ] 0
Memory_Data [957 ] 957
Memory_Ack [954 ] 954
- Transitions -
I GETX 957
I PUTX_NotOwner 0 <--
I DMA_READ 0 <--
I DMA_WRITE 0 <--
I GETX [957 ] 957
I PUTX_NotOwner [0 ] 0
I DMA_READ [0 ] 0
I DMA_WRITE [0 ] 0
M GETX 0 <--
M PUTX 954
M PUTX_NotOwner 0 <--
M DMA_READ 0 <--
M DMA_WRITE 0 <--
M GETX [0 ] 0
M PUTX [954 ] 954
M PUTX_NotOwner [0 ] 0
M DMA_READ [0 ] 0
M DMA_WRITE [0 ] 0
M_DRD GETX 0 <--
M_DRD PUTX 0 <--
M_DRD GETX [0 ] 0
M_DRD PUTX [0 ] 0
M_DWR GETX 0 <--
M_DWR PUTX 0 <--
M_DWR GETX [0 ] 0
M_DWR PUTX [0 ] 0
M_DWRI GETX 0 <--
M_DWRI Memory_Ack 0 <--
M_DWRI GETX [0 ] 0
M_DWRI Memory_Ack [0 ] 0
M_DRDI GETX 0 <--
M_DRDI Memory_Ack 0 <--
M_DRDI GETX [0 ] 0
M_DRDI Memory_Ack [0 ] 0
IM GETX 0 <--
IM GETS 0 <--
IM PUTX 0 <--
IM PUTX_NotOwner 0 <--
IM DMA_READ 0 <--
IM DMA_WRITE 0 <--
IM Memory_Data 957
IM GETX [0 ] 0
IM GETS [0 ] 0
IM PUTX [0 ] 0
IM PUTX_NotOwner [0 ] 0
IM DMA_READ [0 ] 0
IM DMA_WRITE [0 ] 0
IM Memory_Data [957 ] 957
MI GETX 0 <--
MI GETS 0 <--
MI PUTX 0 <--
MI PUTX_NotOwner 0 <--
MI DMA_READ 0 <--
MI DMA_WRITE 0 <--
MI Memory_Ack 954
MI GETX [0 ] 0
MI GETS [0 ] 0
MI PUTX [0 ] 0
MI PUTX_NotOwner [0 ] 0
MI DMA_READ [0 ] 0
MI DMA_WRITE [0 ] 0
MI Memory_Ack [954 ] 954
ID GETX 0 <--
ID GETS 0 <--
ID PUTX 0 <--
ID PUTX_NotOwner 0 <--
ID DMA_READ 0 <--
ID DMA_WRITE 0 <--
ID Memory_Data 0 <--
ID_W GETX 0 <--
ID_W GETS 0 <--
ID_W PUTX 0 <--
ID_W PUTX_NotOwner 0 <--
ID_W DMA_READ 0 <--
ID_W DMA_WRITE 0 <--
ID_W Memory_Ack 0 <--
ID GETX [0 ] 0
ID GETS [0 ] 0
ID PUTX [0 ] 0
ID PUTX_NotOwner [0 ] 0
ID DMA_READ [0 ] 0
ID DMA_WRITE [0 ] 0
ID Memory_Data [0 ] 0
ID_W GETX [0 ] 0
ID_W GETS [0 ] 0
ID_W PUTX [0 ] 0
ID_W PUTX_NotOwner [0 ] 0
ID_W DMA_READ [0 ] 0
ID_W DMA_WRITE [0 ] 0
ID_W Memory_Ack

View File

@@ -1,3 +1,5 @@
Redirecting stdout to build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby/simout
Redirecting stderr to build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby/simerr
M5 Simulator System
Copyright (c) 2001-2008
@@ -5,10 +7,10 @@ The Regents of The University of Michigan
All Rights Reserved
M5 compiled Mar 18 2010 13:52:42
M5 revision 6a6bb24e484f 7041 default qtip tip brad/regress_updates
M5 started Mar 18 2010 13:52:46
M5 executing on cabr0210
M5 compiled Aug 4 2010 17:29:21
M5 revision 1cd2a169499f+ 7535+ default brad/hammer_merge_gets qtip tip
M5 started Aug 5 2010 10:10:57
M5 executing on SC2B0617
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...

View File

@@ -1,8 +1,8 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 208288 # Number of bytes of host memory used
host_seconds 0.10 # Real time elapsed on the host
host_tick_rate 2919378 # Simulator tick rate (ticks/s)
host_mem_usage 208596 # Number of bytes of host memory used
host_seconds 0.09 # Real time elapsed on the host
host_tick_rate 3195386 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.000281 # Number of seconds simulated
sim_ticks 281031 # Number of ticks simulated