From cc53465cd5b48183936278cda617be68a4520ff5 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 11 Feb 2004 16:07:55 -0500 Subject: [PATCH 01/85] Add support for all devices to get requests from a timing memory bus. In the future, this can be used for actual data, but for now, it's so that devices can respond to timing accesses properly. This way, an uncached access on a bus further away will take longer to respond. dev/alpha_console.cc: dev/alpha_console.hh: suport the separate IO bus --HG-- extra : convert_revision : ececb70f5febfd00231f6e406f93b2a79be01261 --- dev/alpha_console.cc | 31 +++++++++++++++++++---- dev/alpha_console.hh | 10 +++++--- dev/io_device.cc | 51 ++++++++++++++++++++++++++++++++++++++ dev/io_device.hh | 58 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 142 insertions(+), 8 deletions(-) create mode 100644 dev/io_device.cc create mode 100644 dev/io_device.hh diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 2dc939b975..85b4d57f28 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -43,6 +43,9 @@ #include "dev/console.hh" #include "dev/simple_disk.hh" #include "dev/tlaser_clock.hh" +#include "mem/bus/bus.hh" +#include "mem/bus/pio_interface.hh" +#include "mem/bus/pio_interface_impl.hh" #include "mem/functional_mem/memory_control.hh" #include "sim/builder.hh" #include "sim/system.hh" @@ -51,11 +54,18 @@ using namespace std; AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, System *system, BaseCPU *cpu, TlaserClock *clock, - int num_cpus, MemoryController *mmu, Addr a) - : FunctionalMemory(name), disk(d), console(cons), addr(a) + int num_cpus, MemoryController *mmu, Addr a, + HierParams *hier, Bus *bus) + : PioDevice(name), disk(d), console(cons), addr(a) { mmu->add_child(this, Range(addr, addr + size)); + if (bus) { + pioInterface = newPioInterface(name, hier, bus, this, + &AlphaConsole::cacheAccess); + pioInterface->setAddrRange(addr, addr + size); + } + consoleData = new uint8_t[size]; memset(consoleData, 0, size); @@ -183,6 +193,12 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data) return No_Fault; } +Tick +AlphaConsole::cacheAccess(MemReqPtr &req) +{ + return curTick + 1000; +} + void AlphaAccess::serialize(ostream &os) { @@ -251,6 +267,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) SimObjectParam system; SimObjectParam cpu; SimObjectParam clock; + SimObjectParam io_bus; + SimObjectParam hier; END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) @@ -263,14 +281,17 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole) INIT_PARAM(addr, "Device Address"), INIT_PARAM(system, "system object"), INIT_PARAM(cpu, "Processor"), - INIT_PARAM(clock, "Turbolaser Clock") + INIT_PARAM(clock, "Turbolaser Clock"), + INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL), + INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams) END_INIT_SIM_OBJECT_PARAMS(AlphaConsole) CREATE_SIM_OBJECT(AlphaConsole) { - return new AlphaConsole(getInstanceName(), sim_console, disk, - system, cpu, clock, num_cpus, mmu, addr); + return new AlphaConsole(getInstanceName(), sim_console, disk, + system, cpu, clock, num_cpus, mmu, + addr, hier, io_bus); } REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole) diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh index 54a2af6d51..b617b64e77 100644 --- a/dev/alpha_console.hh +++ b/dev/alpha_console.hh @@ -35,7 +35,7 @@ #include "base/range.hh" #include "dev/alpha_access.h" -#include "mem/functional_mem/functional_memory.hh" +#include "dev/io_device.hh" #include "sim/host.hh" class BaseCPU; @@ -69,7 +69,7 @@ class SimpleDisk; * primarily used doing boot before the kernel has loaded its device * drivers. */ -class AlphaConsole : public FunctionalMemory +class AlphaConsole : public PioDevice { protected: union { @@ -90,7 +90,8 @@ class AlphaConsole : public FunctionalMemory /** Standard Constructor */ AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d, System *system, BaseCPU *cpu, TlaserClock *clock, - int num_cpus, MemoryController *mmu, Addr addr); + int num_cpus, MemoryController *mmu, Addr addr, + HierParams *hier, Bus *bus); /** * memory mapped reads and writes @@ -103,6 +104,9 @@ class AlphaConsole : public FunctionalMemory */ virtual void serialize(std::ostream &os); virtual void unserialize(Checkpoint *cp, const std::string §ion); + + public: + Tick cacheAccess(MemReqPtr &req); }; #endif // __ALPHA_CONSOLE_HH__ diff --git a/dev/io_device.cc b/dev/io_device.cc new file mode 100644 index 0000000000..65a18aec60 --- /dev/null +++ b/dev/io_device.cc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "dev/io_device.hh" +#include "mem/bus/base_interface.hh" + +PioDevice::PioDevice(const std::string &name) + : FunctionalMemory(name), pioInterface(NULL) +{} + +PioDevice::~PioDevice() +{ + if (pioInterface) + delete pioInterface; +} + +DmaDevice::DmaDevice(const std::string &name) + : PioDevice(name), dmaInterface(NULL) +{} + +DmaDevice::~DmaDevice() +{ + if (dmaInterface) + delete dmaInterface; +} + diff --git a/dev/io_device.hh b/dev/io_device.hh new file mode 100644 index 0000000000..39e6fa4aa0 --- /dev/null +++ b/dev/io_device.hh @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __IO_DEVICE_HH__ +#define __IO_DEVICE_HH__ + +#include "mem/functional_mem/functional_memory.hh" + +class BaseInterface; +class Bus; +class HierParams; + +class PioDevice : public FunctionalMemory +{ + protected: + BaseInterface *pioInterface; + + public: + PioDevice(const std::string &name); + virtual ~PioDevice(); +}; + +class DmaDevice : public PioDevice +{ + protected: + BaseInterface *dmaInterface; + + public: + DmaDevice(const std::string &name); + virtual ~DmaDevice(); +}; + +#endif // __IO_DEVICE_HH__ From 2300633c0a40966b78abdfa40290616db6e6303d Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 12 Feb 2004 13:59:56 -0500 Subject: [PATCH 02/85] better debugging --HG-- extra : convert_revision : 504fc7174403aaeed0574a20587d4651c7351671 From 5c77989c9b4771a08f3481994f1d6f61283957e1 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Tue, 17 Feb 2004 03:05:19 -0500 Subject: [PATCH 03/85] Change the way data is handled in the cache blocks. --HG-- extra : convert_revision : 8c071c4f48581a398bebc4f033e18580dca0897f From 6610699987f54ae1736b70881c2023d93b82370d Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Tue, 17 Feb 2004 22:53:15 -0500 Subject: [PATCH 04/85] Add COW support to the IIC. cpu/memtest/memtest.cc: Move the trace Addr to the end of the printouts --HG-- extra : convert_revision : 875f0a3f65e07f531a23fea6be07fbf3239ec2c4 --- cpu/memtest/memtest.cc | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc index 82bec8ac9e..051d9623a5 100644 --- a/cpu/memtest/memtest.cc +++ b/cpu/memtest/memtest.cc @@ -131,7 +131,8 @@ MemTest::completeRequest(MemReqPtr &req, uint8_t *data) case Read: if (memcmp(req->data, data, req->size) != 0) { cerr << name() << ": on read of 0x" << hex << req->paddr - << " @ cycle " << dec << curTick + << " (0x" << hex << blockAddr(req->paddr) << ")" + << "@ cycle " << dec << curTick << ", cache returns 0x"; printData(cerr, req->data, req->size); cerr << ", expected 0x"; @@ -163,11 +164,13 @@ MemTest::completeRequest(MemReqPtr &req, uint8_t *data) } if (blockAddr(req->paddr) == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " << name() << ": completed " + cerr << name() << ": completed " << (req->cmd.isWrite() ? "write" : "read") << " access of " << dec << req->size << " bytes at address 0x" - << hex << req->paddr << ", value = 0x"; + << hex << req->paddr + << " (0x" << hex << blockAddr(req->paddr) << ")" + << ", value = 0x"; printData(cerr, req->data, req->size); cerr << " @ cycle " << dec << curTick; @@ -249,11 +252,13 @@ MemTest::tick() uint8_t *result = new uint8_t[8]; checkMem->access(Read, req->paddr, result, req->size); if (blockAddr(req->paddr) == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " << name() + cerr << name() << ": initiating read " << ((probe)?"probe of ":"access of ") << dec << req->size << " bytes from addr 0x" - << hex << req->paddr << " at cycle " + << hex << req->paddr + << " (0x" << hex << blockAddr(req->paddr) << ")" + << " at cycle " << dec << curTick << endl; } if (probe) { @@ -269,13 +274,14 @@ MemTest::tick() memcpy(req->data, &data, req->size); checkMem->access(Write, req->paddr, req->data, req->size); if (blockAddr(req->paddr) == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " - << name() << ": initiating write " + cerr << name() << ": initiating write " << ((probe)?"probe of ":"access of ") << dec << req->size << " bytes (value = 0x"; printData(cerr, req->data, req->size); cerr << ") to addr 0x" - << hex << req->paddr << " at cycle " + << hex << req->paddr + << " (0x" << hex << blockAddr(req->paddr) << ")" + << " at cycle " << dec << curTick << endl; } if (probe) { @@ -303,11 +309,15 @@ MemTest::tick() req->data = new uint8_t[blockSize]; req->size = blockSize; if (source == traceBlockAddr || dest == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " << name() + cerr << name() << ": initiating copy of " << dec << req->size << " bytes from addr 0x" - << hex << source << " to addr 0x" - << hex << dest << " at cycle " + << hex << source + << " (0x" << hex << blockAddr(source) << ")" + << " to addr 0x" + << hex << dest + << " (0x" << hex << blockAddr(dest) << ")" + << " at cycle " << dec << curTick << endl; } cacheInterface->access(req); From 2d5ef88e1c782376746c6025843cf2a10ad741a9 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 18 Feb 2004 14:17:13 -0500 Subject: [PATCH 05/85] couple fixes --HG-- extra : convert_revision : bd0948bc831610f442d5ff6893f0e2a68e3aa83f From 12747d3084339d9db52d32e75215242b38474887 Mon Sep 17 00:00:00 2001 From: Andrew Schultz Date: Wed, 18 Feb 2004 21:38:55 -0500 Subject: [PATCH 06/85] Change the physical memory logic, and also add misspeculation fix to tlb index calls that are called from ExecContext::readIpr arch/alpha/ev5.cc: Fix misspeculation bugs for misspeculated IPR accesses --HG-- extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7 --- arch/alpha/alpha_memory.cc | 185 +++++++++++++++++++------------------ arch/alpha/alpha_memory.hh | 2 +- arch/alpha/ev5.cc | 6 +- 3 files changed, 102 insertions(+), 91 deletions(-) diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index 7bdbea6c19..2f0dcfecfd 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -282,19 +282,6 @@ AlphaItb::translate(MemReqPtr &req) const if (req->flags & PHYSICAL) { req->paddr = req->vaddr; - } else if ((MCSR_SP(ipr[AlphaISA::IPR_MCSR]) & 2) && - VA_SPACE(req->vaddr) == 2) { - // Check for "superpage" mapping: when SP<1> is set, and - // VA<42:41> == 2, VA<39:13> maps directly to PA<39:13>. - - // only valid in kernel mode - if (ICM_CM(ipr[AlphaISA::IPR_ICM]) != AlphaISA::mode_kernel) { - fault(req->vaddr, req->xc); - acv++; - return Itb_Acv_Fault; - } - - req->paddr = req->vaddr & PA_IMPL_MASK; } else { // verify that this is a good virtual address if (!validVirtualAddress(req->vaddr)) { @@ -303,24 +290,41 @@ AlphaItb::translate(MemReqPtr &req) const return Itb_Acv_Fault; } - // not a physical address: need to look up pte - AlphaISA::PTE *pte = lookup(VA_VPN(req->vaddr), - DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN])); + // Check for "superpage" mapping: when SP<1> is set, and + // VA<42:41> == 2, VA<39:13> maps directly to PA<39:13>. + if ((MCSR_SP(ipr[AlphaISA::IPR_MCSR]) & 2) && + VA_SPACE(req->vaddr) == 2) { - if (!pte) { - fault(req->vaddr, req->xc); - misses++; - return Itb_Fault_Fault; - } + // only valid in kernel mode + if (ICM_CM(ipr[AlphaISA::IPR_ICM]) != AlphaISA::mode_kernel) { + fault(req->vaddr, req->xc); + acv++; + return Itb_Acv_Fault; + } - req->paddr = PA_PFN2PA(pte->ppn) + VA_POFS(req->vaddr & ~3); + req->paddr = req->vaddr & PA_IMPL_MASK; + } else { + // not a physical address: need to look up pte + AlphaISA::PTE *pte = lookup(VA_VPN(req->vaddr), + DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN])); - // check permissions for this access - if (!(pte->xre & (1 << ICM_CM(ipr[AlphaISA::IPR_ICM])))) { - // instruction access fault - fault(req->vaddr, req->xc); - acv++; - return Itb_Acv_Fault; + if (!pte) { + fault(req->vaddr, req->xc); + misses++; + return Itb_Fault_Fault; + } + + req->paddr = PA_PFN2PA(pte->ppn) + VA_POFS(req->vaddr & ~3); + + // check permissions for this access + if (!(pte->xre & (1 << ICM_CM(ipr[AlphaISA::IPR_ICM])))) { + // instruction access fault + fault(req->vaddr, req->xc); + acv++; + return Itb_Acv_Fault; + } + + hits++; } } @@ -330,7 +334,6 @@ AlphaItb::translate(MemReqPtr &req) const checkCacheability(req); - hits++; return No_Fault; } @@ -453,27 +456,7 @@ AlphaDtb::translate(MemReqPtr &req, bool write) const if (req->flags & PHYSICAL) { req->paddr = req->vaddr; - } else if ((MCSR_SP(ipr[AlphaISA::IPR_MCSR]) & 2) && - VA_SPACE(req->vaddr) == 2) { - // Check for "superpage" mapping: when SP<1> is set, and - // VA<42:41> == 2, VA<39:13> maps directly to PA<39:13>. - - // only valid in kernel mode - if (DTB_CM_CM(ipr[AlphaISA::IPR_DTB_CM]) != AlphaISA::mode_kernel) { - fault(req->vaddr, - ((write ? MM_STAT_WR_MASK : 0) | MM_STAT_ACV_MASK), - req->xc); - if (write) { write_acv++; } else { read_acv++; } - return Dtb_Acv_Fault; - } - - req->paddr = req->vaddr & PA_IMPL_MASK; } else { - if (write) - write_accesses++; - else - read_accesses++; - // verify that this is a good virtual address if (!validVirtualAddress(req->vaddr)) { fault(req->vaddr, @@ -485,48 +468,72 @@ AlphaDtb::translate(MemReqPtr &req, bool write) const return Dtb_Fault_Fault; } - // not a physical address: need to look up pte - AlphaISA::PTE *pte = lookup(VA_VPN(req->vaddr), - DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN])); + // Check for "superpage" mapping: when SP<1> is set, and + // VA<42:41> == 2, VA<39:13> maps directly to PA<39:13>. + if ((MCSR_SP(ipr[AlphaISA::IPR_MCSR]) & 2) && + VA_SPACE(req->vaddr) == 2) { - if (!pte) { - // page fault - fault(req->vaddr, - ((write ? MM_STAT_WR_MASK : 0) | MM_STAT_DTB_MISS_MASK), - req->xc); - if (write) { write_misses++; } else { read_misses++; } - return (req->flags & VPTE) ? Pdtb_Miss_Fault : Ndtb_Miss_Fault; - } - - req->paddr = PA_PFN2PA(pte->ppn) | VA_POFS(req->vaddr); - - if (write) { - if (!(pte->xwe & MODE2MASK(mode))) { - // declare the instruction access fault - fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_ACV_MASK | - (pte->fonw ? MM_STAT_FONW_MASK : 0), - req->xc); - write_acv++; - return Dtb_Fault_Fault; - } - if (pte->fonw) { - fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_FONW_MASK, - req->xc); - write_acv++; - return Dtb_Fault_Fault; - } - } else { - if (!(pte->xre & MODE2MASK(mode))) { + // only valid in kernel mode + if (DTB_CM_CM(ipr[AlphaISA::IPR_DTB_CM]) != + AlphaISA::mode_kernel) { fault(req->vaddr, - MM_STAT_ACV_MASK | (pte->fonr ? MM_STAT_FONR_MASK : 0), + ((write ? MM_STAT_WR_MASK : 0) | MM_STAT_ACV_MASK), req->xc); - read_acv++; + if (write) { write_acv++; } else { read_acv++; } return Dtb_Acv_Fault; } - if (pte->fonr) { - fault(req->vaddr, MM_STAT_FONR_MASK, req->xc); - read_acv++; - return Dtb_Fault_Fault; + + req->paddr = req->vaddr & PA_IMPL_MASK; + } else { + if (write) + write_accesses++; + else + read_accesses++; + + // not a physical address: need to look up pte + AlphaISA::PTE *pte = lookup(VA_VPN(req->vaddr), + DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN])); + + if (!pte) { + // page fault + fault(req->vaddr, + ((write ? MM_STAT_WR_MASK : 0) | MM_STAT_DTB_MISS_MASK), + req->xc); + if (write) { write_misses++; } else { read_misses++; } + return (req->flags & VPTE) ? Pdtb_Miss_Fault : Ndtb_Miss_Fault; + } + + req->paddr = PA_PFN2PA(pte->ppn) | VA_POFS(req->vaddr); + + if (write) { + if (!(pte->xwe & MODE2MASK(mode))) { + // declare the instruction access fault + fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_ACV_MASK | + (pte->fonw ? MM_STAT_FONW_MASK : 0), + req->xc); + write_acv++; + return Dtb_Fault_Fault; + } + if (pte->fonw) { + fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_FONW_MASK, + req->xc); + write_acv++; + return Dtb_Fault_Fault; + } + } else { + if (!(pte->xre & MODE2MASK(mode))) { + fault(req->vaddr, + MM_STAT_ACV_MASK | + (pte->fonr ? MM_STAT_FONR_MASK : 0), + req->xc); + read_acv++; + return Dtb_Acv_Fault; + } + if (pte->fonr) { + fault(req->vaddr, MM_STAT_FONR_MASK, req->xc); + read_acv++; + return Dtb_Fault_Fault; + } } } @@ -546,10 +553,12 @@ AlphaDtb::translate(MemReqPtr &req, bool write) const } AlphaISA::PTE & -AlphaTlb::index() +AlphaTlb::index(bool advance) { AlphaISA::PTE *pte = &table[nlu]; - nextnlu(); + + if (advance) + nextnlu(); return *pte; } diff --git a/arch/alpha/alpha_memory.hh b/arch/alpha/alpha_memory.hh index 482a13eee8..999eec228a 100644 --- a/arch/alpha/alpha_memory.hh +++ b/arch/alpha/alpha_memory.hh @@ -56,7 +56,7 @@ class AlphaTlb : public SimObject int getsize() const { return size; } - AlphaISA::PTE &index(); + AlphaISA::PTE &index(bool advance = true); void insert(Addr vaddr, AlphaISA::PTE &pte); void flushAll(); diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 8494ee9f65..aaa81a58d8 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -240,7 +240,9 @@ ExecContext::readIpr(int idx, Fault &fault) case AlphaISA::IPR_VA: // SFX: unlocks interrupt status registers retval = ipr[idx]; - regs.intrlock = false; + + if (!misspeculating()) + regs.intrlock = false; break; case AlphaISA::IPR_VA_FORM: @@ -253,7 +255,7 @@ ExecContext::readIpr(int idx, Fault &fault) case AlphaISA::IPR_DTB_PTE: { - AlphaISA::PTE &pte = dtb->index(); + AlphaISA::PTE &pte = dtb->index(!misspeculating()); retval |= ((u_int64_t)pte.ppn & ULL(0x7ffffff)) << 32; retval |= ((u_int64_t)pte.xre & ULL(0xf)) << 8; From 4ec55bef1179a3fc8aa0e2a4c6f0ec37df444e7e Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Thu, 19 Feb 2004 17:58:17 -0500 Subject: [PATCH 07/85] interestingly, when setup is called from a perl script, when you chdir in the perl script, the ENV{PWD} does not change. --HG-- extra : convert_revision : e1b2fb3e3b791921b9c3f4bb3b7417ff047bbcbf From 5e494f0c5910d91d50e49e50c60f88e85d373e41 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 20 Feb 2004 12:37:52 -0500 Subject: [PATCH 08/85] put back $SETUPDIR = $ENV{PWD} for amd purposes. --HG-- extra : convert_revision : 115a9ea8d08bf3e32ecb689962c8a12c9a7dba26 From 373d70980eabb4598ee1fcc9429e38ef15950e04 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Fri, 20 Feb 2004 12:44:41 -0500 Subject: [PATCH 09/85] Add serialization for packets on the ethernet link, and for link events --HG-- extra : convert_revision : 0054dbc4a42dd38ff8bbf64af303bc509dd5aa8a --- dev/etherlink.cc | 51 ++++++++++++++++++++++++++++++++++++++++++++++++ dev/etherlink.hh | 7 +++++++ 2 files changed, 58 insertions(+) diff --git a/dev/etherlink.cc b/dev/etherlink.cc index 676b1da1c6..7c70b82ce5 100644 --- a/dev/etherlink.cc +++ b/dev/etherlink.cc @@ -42,6 +42,7 @@ #include "dev/etherpkt.hh" #include "sim/builder.hh" #include "sim/universe.hh" +#include "sim/system.hh" using namespace std; @@ -84,6 +85,20 @@ EtherLink::Link::Link(const std::string &name, double rate, EtherDump *d) dump(d), event(&mainEventQueue, this) {} +void +EtherLink::serialize(ostream &os) +{ + link1->serialize(os); + link2->serialize(os); +} + +void +EtherLink::unserialize(Checkpoint *cp, const string §ion) +{ + link1->unserialize(cp, section); + link2->unserialize(cp, section); +} + void EtherLink::Link::txDone() { @@ -121,6 +136,42 @@ EtherLink::Link::transmit(PacketPtr &pkt) return true; } +void +EtherLink::Link::serialize(ostream &os) +{ + bool packetExists = false; + if (packet) packetExists = true; + SERIALIZE_SCALAR(packetExists); + if (packetExists) { + nameOut(os, csprintf("%s.linkPacket", name())); + packet->serialize(os); + } + + bool event_scheduled = event.scheduled(); + SERIALIZE_SCALAR(event_scheduled); + if (event_scheduled) { + SERIALIZE_SCALAR(event.when()); + } +} + +void +EtherLink::Link::unserialize(Checkpoint *cp, const string §ion) +{ + bool event_scheduled, packetExists; + Tick eventTime; + UNSERIALIZE_SCALAR(packetExists); + if (packetExists) { + packet = new EtherPacket; + packet->unserialize(cp, csprintf("%s.linkPacket", section)); + } + + UNSERIALIZE_SCALAR(event_scheduled); + if (event_scheduled) { + UNSERIALIZE_SCALAR(eventTime); + event.schedule(eventTime); + } +} + BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherLink) SimObjectParam interface1; diff --git a/dev/etherlink.hh b/dev/etherlink.hh index e1a7957ee3..8505570a61 100644 --- a/dev/etherlink.hh +++ b/dev/etherlink.hh @@ -96,6 +96,9 @@ class EtherLink : public SimObject void setTxInt(Interface *i) { assert(!txint); txint = i; } void setRxInt(Interface *i) { assert(!rxint); rxint = i; } + + virtual void serialize(std::ostream &os); + virtual void unserialize(Checkpoint *cp, const std::string §ion); }; /* @@ -122,6 +125,10 @@ class EtherLink : public SimObject EtherLink(const std::string &name, EtherInt *i1, EtherInt *i2, Tick speed, EtherDump *dump); virtual ~EtherLink(); + + virtual void serialize(std::ostream &os); + virtual void unserialize(Checkpoint *cp, const std::string §ion); + }; #endif // __ETHERLINK_HH__ From ee8c8cbcd89f70d50a770007c6bcaf428ac2f233 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:19:19 -0500 Subject: [PATCH 10/85] make etherdump work again dev/etherdump.cc: now that init is automatically called by the framework, don't init twice. --HG-- extra : convert_revision : 16dcdef67aa193ed71ff546e7b255d60f39bf13d --- dev/etherdump.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/dev/etherdump.cc b/dev/etherdump.cc index 6d86adc324..23b3d778e2 100644 --- a/dev/etherdump.cc +++ b/dev/etherdump.cc @@ -43,11 +43,8 @@ using std::string; EtherDump::EtherDump(const string &name, const string &file) : SimObject(name) { - if (!file.empty()) { + if (!file.empty()) stream.open(file.c_str()); - if (stream.is_open()) - init(); - } } #define DLT_EN10MB 1 // Ethernet (10Mb) @@ -74,6 +71,9 @@ struct pcap_pkthdr { void EtherDump::init() { + if (!stream.is_open()) + return; + curtime = time(NULL); s_freq = ticksPerSecond; us_freq = ticksPerSecond / ULL(1000000); From a51cec66694a550417dcf792c72cbecbd79f3da7 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:19:55 -0500 Subject: [PATCH 11/85] Make it so dump takes a void * base/trace.cc: base/trace.hh: take a void * for the raw data --HG-- extra : convert_revision : fc336dc82b4d533c3a0f319977074f26342445ea --- base/trace.cc | 3 +-- base/trace.hh | 4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/base/trace.cc b/base/trace.cc index 1561103761..cca58d669f 100644 --- a/base/trace.cc +++ b/base/trace.cc @@ -208,8 +208,7 @@ PrintfRecord::dump(ostream &os) -RawDataRecord::RawDataRecord(Tick _cycle, - const uint8_t *_data, int _len) +RawDataRecord::RawDataRecord(Tick _cycle, const void *_data, int _len) : Record(_cycle), len(_len) { data = new uint8_t[len]; diff --git a/base/trace.hh b/base/trace.hh index 9e59527654..e49d7aa615 100644 --- a/base/trace.hh +++ b/base/trace.hh @@ -108,7 +108,7 @@ namespace Trace { int len; public: - RawDataRecord(Tick cycle, const uint8_t *_data, int _len); + RawDataRecord(Tick cycle, const void *_data, int _len); virtual ~RawDataRecord(); virtual void dump(std::ostream &); @@ -149,7 +149,7 @@ namespace Trace { } inline void - rawDump(const uint8_t *data, int len) + rawDump(const void *data, int len) { theLog.append(new Trace::RawDataRecord(curTick, data, len)); } From aa483a002623e8d94955dbce42765cb9f0210059 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:20:37 -0500 Subject: [PATCH 12/85] Don't need to specify two etherdump devices --HG-- extra : convert_revision : 62e8d6b218909c00a97d71e0d3b0f11816499fbf From 38e8cb8df13496193190fec8dbd8ebc288dca85e Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:22:02 -0500 Subject: [PATCH 13/85] make the devices default to being attached to the memory bus but provide a #define that can be used to put them on a separate IO bus --HG-- extra : convert_revision : 75d48f312c503ad67d22319db691ef5a0de12996 From 695d51e5137f43052dc54e211eb1ab239100008d Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:22:41 -0500 Subject: [PATCH 14/85] make uncacheable stuff happen again cpu/simple_cpu/simple_cpu.cc: Allow requests to be uncacheable --HG-- extra : convert_revision : 7ab1442f2eec3763d5bc6a6f37b11f663851b12c --- cpu/simple_cpu/simple_cpu.cc | 3 --- 1 file changed, 3 deletions(-) diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index efbe660203..d039890c71 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -343,7 +343,6 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags) memReq->cmd = Read; memReq->completionEvent = NULL; memReq->time = curTick; - memReq->flags &= ~UNCACHEABLE; MemAccessResult result = dcacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is @@ -426,7 +425,6 @@ SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) memcpy(memReq->data,(uint8_t *)&data,memReq->size); memReq->completionEvent = NULL; memReq->time = curTick; - memReq->flags &= ~UNCACHEABLE; MemAccessResult result = dcacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is @@ -629,7 +627,6 @@ SimpleCPU::tick() memReq->completionEvent = NULL; memReq->time = curTick; - memReq->flags &= ~UNCACHEABLE; MemAccessResult result = icacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is From ec06c63cc7a63111e9d21936a302901c552ad36b Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:23:27 -0500 Subject: [PATCH 15/85] make the dma interface useable. make it so that pio devices must respond with some delay. dev/io_device.cc: don't forget to include dma_interface.hh so we could use it. dev/io_device.hh: the generic BusInterface isn't enough for doing DMA we need the actual DMAInterface --HG-- extra : convert_revision : 70298d33c8520a3f4ad11aa600825a8cec7e44bf --- dev/io_device.cc | 1 + dev/io_device.hh | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/dev/io_device.cc b/dev/io_device.cc index 65a18aec60..4f53ba48d3 100644 --- a/dev/io_device.cc +++ b/dev/io_device.cc @@ -28,6 +28,7 @@ #include "dev/io_device.hh" #include "mem/bus/base_interface.hh" +#include "mem/bus/dma_interface.hh" PioDevice::PioDevice(const std::string &name) : FunctionalMemory(name), pioInterface(NULL) diff --git a/dev/io_device.hh b/dev/io_device.hh index 39e6fa4aa0..9300d87e7d 100644 --- a/dev/io_device.hh +++ b/dev/io_device.hh @@ -34,6 +34,7 @@ class BaseInterface; class Bus; class HierParams; +template class DMAInterface; class PioDevice : public FunctionalMemory { @@ -48,7 +49,7 @@ class PioDevice : public FunctionalMemory class DmaDevice : public PioDevice { protected: - BaseInterface *dmaInterface; + DMAInterface *dmaInterface; public: DmaDevice(const std::string &name); From a1259a4fcf5f1b1c38a7209928a2321cd65daec2 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:24:21 -0500 Subject: [PATCH 16/85] Add a simple event wrapper class that takes a class pointer and member function and will schedule it for the future. --HG-- extra : convert_revision : f5c5a8df0839e1e10716850c2086862c4a5bc499 --- sim/eventq.hh | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/sim/eventq.hh b/sim/eventq.hh index 31bf9d6527..60a61fa298 100644 --- a/sim/eventq.hh +++ b/sim/eventq.hh @@ -236,6 +236,20 @@ DelayFunction(Tick when, T *object) new DelayEvent(when, object); } +template +class EventWrapper : public Event +{ + private: + T *object; + + public: + EventWrapper(T *obj, EventQueue *q = &mainEventQueue, + Priority p = Default_Pri) + : Event(q, p), object(obj) + {} + void process() { (object->*F)(); } +}; + /* * Queue of events sorted in time order */ From 610081079cd02a620794fa1ac693822c191223ec Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 21 Feb 2004 10:43:37 -0500 Subject: [PATCH 17/85] New Ethernet device. Descriptors are now done via DMA instead of faking it. Renamed stuff to follow our style. Lots of general cleanup. dev/etherpkt.hh: fix up includes --HG-- extra : convert_revision : fb3a21466cdae00f8747d6e3027c9f2c63569c48 --- dev/etherpkt.cc | 50 +++++++++++++++++++++++++++++++++++++++++++++++++ dev/etherpkt.hh | 2 +- 2 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 dev/etherpkt.cc diff --git a/dev/etherpkt.cc b/dev/etherpkt.cc new file mode 100644 index 0000000000..cb6087c897 --- /dev/null +++ b/dev/etherpkt.cc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2004 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include "dev/etherpkt.hh" +#include "sim/serialize.hh" + +using namespace std; + +void +EtherPacket::serialize(ostream &os) +{ + SERIALIZE_SCALAR(length); + SERIALIZE_ARRAY(data, length); +} + +void +EtherPacket::unserialize(Checkpoint *cp, const std::string §ion) +{ + UNSERIALIZE_SCALAR(length); + data = new uint8_t[length]; + UNSERIALIZE_ARRAY(data, length); +} + diff --git a/dev/etherpkt.hh b/dev/etherpkt.hh index c913225260..27ac526d69 100644 --- a/dev/etherpkt.hh +++ b/dev/etherpkt.hh @@ -33,10 +33,10 @@ #ifndef __ETHERPKT_HH__ #define __ETHERPKT_HH__ +#include #include #include "sim/host.hh" - #include "base/refcnt.hh" class Checkpoint; From e067bc751bd13d73dfb0abe31f296140e3e29de9 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 21 Feb 2004 10:46:31 -0500 Subject: [PATCH 18/85] Change order of serialization sim/sim_object.cc: serialize objects in the reverse order of their creation. This causes a SimObject that is dependent on another to be serialized first. For example, the ethernet device writes back some data to physical memory while serializing, so this will cause the physical memory to be serialized after that, preserving the data written back. --HG-- extra : convert_revision : f9a37b63ce777df1cfecefa80f94f8fc69e42448 --- sim/sim_object.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sim/sim_object.cc b/sim/sim_object.cc index b3ac2c7a49..c55021e41a 100644 --- a/sim/sim_object.cc +++ b/sim/sim_object.cc @@ -182,11 +182,11 @@ SimObject::printAllExtraOutput(ostream &os) void SimObject::serializeAll(ostream &os) { - SimObjectList::iterator i = simObjectList.begin(); - SimObjectList::iterator end = simObjectList.end(); + SimObjectList::reverse_iterator ri = simObjectList.rbegin(); + SimObjectList::reverse_iterator rend = simObjectList.rend(); - for (; i != end; ++i) { - SimObject *obj = *i; + for (; ri != rend; ++ri) { + SimObject *obj = *ri; obj->nameOut(os); obj->serialize(os); } From bc5ed80b32c703fb86ead2dbd525b7c6323e563f Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 22 Feb 2004 18:09:11 -0500 Subject: [PATCH 19/85] configurable latency for programmed IO fix serialization dev/etherlink.cc: fix serialization --HG-- extra : convert_revision : 6739001f3f97b745d9874bb4c5729cc4909625c2 --- dev/etherlink.cc | 38 +++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 17 deletions(-) diff --git a/dev/etherlink.cc b/dev/etherlink.cc index 7c70b82ce5..6396d758dd 100644 --- a/dev/etherlink.cc +++ b/dev/etherlink.cc @@ -88,15 +88,17 @@ EtherLink::Link::Link(const std::string &name, double rate, EtherDump *d) void EtherLink::serialize(ostream &os) { + nameOut(os, name() + ".link1"); link1->serialize(os); + nameOut(os, name() + ".link2"); link2->serialize(os); } void EtherLink::unserialize(Checkpoint *cp, const string §ion) { - link1->unserialize(cp, section); - link2->unserialize(cp, section); + link1->unserialize(cp, section + ".link1"); + link2->unserialize(cp, section + ".link2"); } void @@ -139,36 +141,38 @@ EtherLink::Link::transmit(PacketPtr &pkt) void EtherLink::Link::serialize(ostream &os) { - bool packetExists = false; - if (packet) packetExists = true; - SERIALIZE_SCALAR(packetExists); - if (packetExists) { - nameOut(os, csprintf("%s.linkPacket", name())); - packet->serialize(os); - } + bool packet_exists = packet; + SERIALIZE_SCALAR(packet_exists); bool event_scheduled = event.scheduled(); SERIALIZE_SCALAR(event_scheduled); if (event_scheduled) { - SERIALIZE_SCALAR(event.when()); + Tick event_time = event.when(); + SERIALIZE_SCALAR(event_time); + } + + if (packet_exists) { + nameOut(os, csprintf("%s.packet", name())); + packet->serialize(os); } } void EtherLink::Link::unserialize(Checkpoint *cp, const string §ion) { - bool event_scheduled, packetExists; - Tick eventTime; - UNSERIALIZE_SCALAR(packetExists); - if (packetExists) { + bool packet_exists; + UNSERIALIZE_SCALAR(packet_exists); + if (packet_exists) { packet = new EtherPacket; - packet->unserialize(cp, csprintf("%s.linkPacket", section)); + packet->unserialize(cp, csprintf("%s.packet", section)); } + bool event_scheduled; UNSERIALIZE_SCALAR(event_scheduled); if (event_scheduled) { - UNSERIALIZE_SCALAR(eventTime); - event.schedule(eventTime); + Tick event_time; + UNSERIALIZE_SCALAR(event_time); + event.schedule(event_time); } } From 052e0e31161c2bb230aba3e0819f62b55b88877e Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 23 Feb 2004 02:44:22 -0500 Subject: [PATCH 20/85] Make this like PCI-X --HG-- extra : convert_revision : 59eaf2c548a88df075b13e78aaa7a4377f20e6c8 From 220952d5924d49cdd79f063a56c52d39b4de2c07 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 23 Feb 2004 02:46:04 -0500 Subject: [PATCH 21/85] Don't issue memory requests for bogus addresses --HG-- extra : convert_revision : 786b7fa503436f9a269ebeaedf152c6364874ab5 From cc863129b89b6c7884f68a61844d6d16a700b2ee Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 23 Feb 2004 02:46:47 -0500 Subject: [PATCH 22/85] extend the hack by turning the address into a real physical address --HG-- extra : convert_revision : 9f752d5ab6def492056d4dfe0bda5eecb022ba80 From 6d574e9cff50e7c6bacd6f3d16e84810c88a2647 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 23 Feb 2004 02:49:09 -0500 Subject: [PATCH 23/85] Only one request may be on the dma interface at a time, so add some states to indicate that the dma read/write hasn't issued yet, and add some support to reissue the request when the interface becomes unblocked. --HG-- extra : convert_revision : 448695a8eb2e9f98554769f3165df1f796adf44a From f9c91277f356285b58c4e9a1c9c15248676ce9ab Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Mon, 23 Feb 2004 08:07:32 -0800 Subject: [PATCH 24/85] Quote args properly in tracediff. util/tracediff: Quote simulator args so args with spaces get handled correctly. --HG-- extra : convert_revision : b48677bc712be17e6e50ca35680e757ba9364692 --- util/tracediff | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/util/tracediff b/util/tracediff index fac4f0ec09..0aa579a7d1 100755 --- a/util/tracediff +++ b/util/tracediff @@ -1,5 +1,5 @@ #! /usr/bin/env perl -# Copyright (c) 2003 The Regents of The University of Michigan +# Copyright (c) 2003-2004 The Regents of The University of Michigan # All rights reserved. # # Redistribution and use in source and binary forms, with or without @@ -39,7 +39,7 @@ $sim2 = shift; # Everything else on the command line is taken to be an m5 argument to # be given to both invocations -$simargs = join(' ', @ARGV); +$simargs = '"' . join('" "', @ARGV) . '"'; $cmd1 = "$sim1 $simargs --stats:file=tracediff-$$-1.stats 2>&1 |"; $cmd2 = "$sim2 $simargs --stats:file=tracediff-$$-2.stats 2>&1 |"; From 6a306d4cafae360c9107a845ee2d08c8667453ae Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Tue, 24 Feb 2004 14:59:25 -0500 Subject: [PATCH 25/85] add in an init() callback for CPU's so that no stats are accessed prior to the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process). cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: same thing for simple cpu's. --HG-- extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662 --- cpu/simple_cpu/simple_cpu.cc | 23 +++++++++++++++++------ cpu/simple_cpu/simple_cpu.hh | 8 ++++++-- 2 files changed, 23 insertions(+), 8 deletions(-) diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index d039890c71..721861dd5e 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -120,7 +120,7 @@ SimpleCPU::SimpleCPU(const string &_name, FunctionalMemory *mem, MemInterface *icache_interface, MemInterface *dcache_interface, - Tick freq) + bool _def_reg, Tick freq) : BaseCPU(_name, /* number_of_threads */ 1, max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads, @@ -132,12 +132,14 @@ SimpleCPU::SimpleCPU(const string &_name, Process *_process, Counter max_loads_any_thread, Counter max_loads_all_threads, MemInterface *icache_interface, - MemInterface *dcache_interface) + MemInterface *dcache_interface, + bool _def_reg) : BaseCPU(_name, /* number_of_threads */ 1, max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads), #endif - tickEvent(this), xc(NULL), cacheCompletionEvent(this) + tickEvent(this), xc(NULL), defer_registration(_def_reg), + cacheCompletionEvent(this) { _status = Idle; #ifdef FULL_SYSTEM @@ -171,6 +173,13 @@ SimpleCPU::~SimpleCPU() { } +void SimpleCPU::init() +{ + if (!defer_registration) { + this->registerExecContexts(); + } +} + void SimpleCPU::switchOut() { @@ -810,6 +819,7 @@ CREATE_SIM_OBJECT(SimpleCPU) itb, dtb, mem, (icache) ? icache->getInterface() : NULL, (dcache) ? dcache->getInterface() : NULL, + defer_registration, ticksPerSecond * mult); #else @@ -817,14 +827,15 @@ CREATE_SIM_OBJECT(SimpleCPU) max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads, (icache) ? icache->getInterface() : NULL, - (dcache) ? dcache->getInterface() : NULL); + (dcache) ? dcache->getInterface() : NULL, + defer_registration); #endif // FULL_SYSTEM - +#if 0 if (!defer_registration) { cpu->registerExecContexts(); } - +#endif return cpu; } diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 16753fa4f9..4a9872e75d 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -133,7 +133,7 @@ class SimpleCPU : public BaseCPU Counter max_loads_any_thread, Counter max_loads_all_threads, AlphaItb *itb, AlphaDtb *dtb, FunctionalMemory *mem, MemInterface *icache_interface, MemInterface *dcache_interface, - Tick freq); + bool _def_reg, Tick freq); #else @@ -142,11 +142,13 @@ class SimpleCPU : public BaseCPU Counter max_insts_all_threads, Counter max_loads_any_thread, Counter max_loads_all_threads, - MemInterface *icache_interface, MemInterface *dcache_interface); + MemInterface *icache_interface, MemInterface *dcache_interface, + bool _def_reg); #endif virtual ~SimpleCPU(); + virtual void init(); // execution context ExecContext *xc; @@ -166,6 +168,8 @@ class SimpleCPU : public BaseCPU // L1 data cache MemInterface *dcacheInterface; + bool defer_registration; + // current instruction MachInst inst; From b678152277d5f876efcf7bcac99926a977fdccac Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 25 Feb 2004 16:12:48 -0500 Subject: [PATCH 26/85] Fix stats debugging and always compile it in for the debug target --HG-- extra : convert_revision : aa16e6256a056e6df9affec6fd973e62e812e23c --- base/statistics.cc | 14 +++++++++++--- base/statistics.hh | 15 +++++---------- 2 files changed, 16 insertions(+), 13 deletions(-) diff --git a/base/statistics.cc b/base/statistics.cc index 49294ad275..dce545f18a 100644 --- a/base/statistics.cc +++ b/base/statistics.cc @@ -57,7 +57,7 @@ __nan() } #endif -#ifdef STAT_DEBUG +#ifdef DEBUG static int total_stats = 0; #endif @@ -409,6 +409,14 @@ DataAccess::setPrint() Database::StatDB().regPrint(this); } +StatData::StatData() + : flags(none), precision(-1), prereq(0) +{ +#ifdef DEBUG + number = total_stats++; +#endif +} + StatData::~StatData() { } @@ -443,8 +451,8 @@ bool StatData::baseCheck() const { if (!(flags & init)) { -#ifdef STAT_DEBUG - cprintf("this is stat number %d\n",(*i)->number); +#ifdef DEBUG + cprintf("this is stat number %d\n", number); #endif panic("Not all stats have been initialized"); return false; diff --git a/base/statistics.hh b/base/statistics.hh index d8b78fbffe..71d2aa8c8a 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -60,12 +60,6 @@ #include "base/str.hh" #include "sim/host.hh" -// -// Un-comment this to enable weirdo-stat debugging -// -// #define STAT_DEBUG - - #ifndef NAN float __nan(); /** Define Not a number. */ @@ -146,10 +140,7 @@ struct StatData /** A pointer to a prerequisite Stat. */ const StatData *prereq; - StatData() - : flags(none), precision(-1), prereq(0) - {} - + StatData(); virtual ~StatData(); /** @@ -193,6 +184,10 @@ struct StatData * @return stat1's name is alphabetically before stat2's */ static bool less(StatData *stat1, StatData *stat2); + +#ifdef DEBUG + int number; +#endif }; struct ScalarDataBase : public StatData From a253251ae07407b29e8548bb307590dfc2131b64 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 25 Feb 2004 16:16:17 -0500 Subject: [PATCH 27/85] prevent bogus addresses from being sent to the memory system --HG-- extra : convert_revision : 4f08f8c7ab380436b2ad2c30ba53d9fe305e4496 From 752b6cf7c6122bfd198d03afd69553b7451fabf5 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Wed, 25 Feb 2004 18:25:20 -0500 Subject: [PATCH 28/85] delay execContext registration from create() to init() callback in the sampling cpu also. --HG-- extra : convert_revision : d3947c55f95bb03e73a815188a517043f39925d4 From f93e9e063a8b5aabe809849ac75ae9affcf472d1 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Wed, 25 Feb 2004 21:32:37 -0500 Subject: [PATCH 29/85] Make this compile under non full system. --HG-- extra : convert_revision : 6ae9b4af78cff3c8e5dc367fdbefad496a28857d From f8ad539aa5c917bb10d5aeea470353700fb2b9f3 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 26 Feb 2004 01:18:13 -0500 Subject: [PATCH 30/85] Save the status of faulting write-hints so that they won't accidentally be issued to the memory system. --HG-- extra : convert_revision : 5696a09abcdee54c8bec72d9374f7944fb136740 From 6f5e104fc5683ace0c17ddb402bf8d40330f60aa Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Thu, 26 Feb 2004 07:05:36 -0800 Subject: [PATCH 31/85] Make SW prefetch flag a parameter again, and add code to make it actually do something on FullCPU. Still disabled, as it causes detailed-boot to hang when you turn it on. arch/alpha/isa_desc: Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst. cpu/simple_cpu/simple_cpu.hh: Changed prefetch() return type from Fault to void. --HG-- extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7 --- arch/alpha/isa_desc | 42 +++++++++++++++++++++++++++++++++++- cpu/simple_cpu/simple_cpu.hh | 3 +-- 2 files changed, 42 insertions(+), 3 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 75b2f4138c..6a95b4e042 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1000,10 +1000,50 @@ def template PrefetchDeclare {{ */ class %(class_name)s : public %(base_class)s { + protected: + + /** + * "Fake" effective address computation class for "%(mnemonic)s". + */ + class EAComp : public EACompBase + { + public: + /// Constructor + EAComp(MachInst machInst) + : EACompBase(machInst) + { + %(ea_constructor)s; + } + }; + + /** + * "Fake" memory access instruction class for "%(mnemonic)s". + */ + class MemAcc : public MemAccBase + { + public: + /// Constructor + MemAcc(MachInst machInst) + : MemAccBase(machInst, %(op_class)s) + { + %(memacc_constructor)s; + } + }; + + /// Pointer to EAComp object. + StaticInstPtr eaCompPtr; + /// Pointer to MemAcc object. + StaticInstPtr memAccPtr; + public: + + StaticInstPtr eaCompInst() { return eaCompPtr; } + StaticInstPtr memAccInst() { return memAccPtr; } + /// Constructor %(class_name)s(MachInst machInst) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) + : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s), + eaCompPtr(new EAComp(machInst)), memAccPtr(new MemAcc(machInst)) { %(constructor)s; } diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 4a9872e75d..2b881509c8 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -237,10 +237,9 @@ class SimpleCPU : public BaseCPU Fault write(T data, Addr addr, unsigned flags, uint64_t *res); - Fault prefetch(Addr addr, unsigned flags) + void prefetch(Addr addr, unsigned flags) { // need to do this... - return No_Fault; } void writeHint(Addr addr, int size) From 5e8631fd164751f5f6d63da60450fb9131de1c2b Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 26 Feb 2004 14:16:18 -0500 Subject: [PATCH 32/85] stoopid --HG-- extra : convert_revision : ccd87a2de7f684bb3a4a448a307eb30afd363e12 From 006fb9b4217505010c1d31fe5393dfeb086ffecd Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Thu, 26 Feb 2004 16:59:04 -0500 Subject: [PATCH 33/85] Quick hack to allow rerequests for the future. --HG-- extra : convert_revision : 4f1b080ae500dfd022c28e0cd7544c4fcfa5e330 From 2399fb1196f51d18c79402546f190a5ec83cd66c Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Thu, 26 Feb 2004 20:36:29 -0500 Subject: [PATCH 34/85] The DMAInterface was never updated to the new blocking model. Need to hold the request locally until it is retransmitted. --HG-- extra : convert_revision : cc89d6c4b7f21b7252c172c694633ce1daae30eb From 81c1d76d015490e039172332093c9c876e1f3144 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 26 Feb 2004 20:40:00 -0500 Subject: [PATCH 35/85] fix --HG-- extra : convert_revision : 67a9e36cda69da6b462e6a30d6daa047ce48fdde From c3784e37ceba78eee92f46ed92aa2462e238a206 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Fri, 27 Feb 2004 00:45:21 -0500 Subject: [PATCH 36/85] Initial copy support in the pipeline. Add copypal counting. arch/alpha/osfpal.cc: Add a string for copypal. arch/alpha/osfpal.hh: Add a code for copypal. cpu/static_inst.hh: Add an IsCopy flag. --HG-- extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f --- arch/alpha/osfpal.cc | 2 +- arch/alpha/osfpal.hh | 1 + cpu/static_inst.hh | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/alpha/osfpal.cc b/arch/alpha/osfpal.cc index 4c0ace8c06..90d645ef13 100644 --- a/arch/alpha/osfpal.cc +++ b/arch/alpha/osfpal.cc @@ -224,8 +224,8 @@ namespace { 0, // 0xbc 0, // 0xbd "nphalt", // 0xbe + "copypal", // 0xbf #if 0 - 0, // 0xbf 0, // 0xc0 0, // 0xc1 0, // 0xc2 diff --git a/arch/alpha/osfpal.hh b/arch/alpha/osfpal.hh index 61e5453061..419235b4ab 100644 --- a/arch/alpha/osfpal.hh +++ b/arch/alpha/osfpal.hh @@ -70,6 +70,7 @@ struct PAL gentrap = 0xaa, clrfen = 0xae, nphalt = 0xbe, + copypal = 0xbf, NumCodes }; diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 5f4bcae3d3..cdf9aefa0e 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -96,6 +96,7 @@ class StaticInstBase : public RefCounted IsStore, ///< Writes to memory. IsInstPrefetch, ///< Instruction-cache prefetch. IsDataPrefetch, ///< Data-cache prefetch. + IsCopy, ///< Fast Cache block copy IsControl, ///< Control transfer instruction. IsDirectControl, ///< PC relative control transfer. @@ -176,6 +177,7 @@ class StaticInstBase : public RefCounted bool isStore() const { return flags[IsStore]; } bool isInstPrefetch() const { return flags[IsInstPrefetch]; } bool isDataPrefetch() const { return flags[IsDataPrefetch]; } + bool isCopy() const { return flags[IsCopy];} bool isInteger() const { return flags[IsInteger]; } bool isFloating() const { return flags[IsFloating]; } From cfb6f8fd01e19dbd0b3ce5cfa28d6f78f617e954 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Fri, 27 Feb 2004 02:40:43 -0500 Subject: [PATCH 37/85] Added copy instructions to the ISA. Well it didn't break anything yet... arch/alpha/isa_desc: Add copy_load and copy_store insts (ldf and stf respectively) cpu/simple_cpu/simple_cpu.hh: Add copy functions to SimpleCPU as well --HG-- extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d --- arch/alpha/isa_desc | 6 ++++++ cpu/simple_cpu/simple_cpu.hh | 11 +++++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 6a95b4e042..46fb306a4f 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1854,6 +1854,9 @@ decode OPCODE default Unknown::unknown() { 0x23: ldt({{ EA = Rb + disp; }}, {{ Fa = Mem.df; }}); 0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED); 0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED); + 0x20: copy_load({{EA = Ra;}}, + {{memAccessObj->copySrcTranslate(EA);}}, + IsMemRef, IsLoad, IsCopy); } format LoadOrPrefetch { @@ -1873,6 +1876,9 @@ decode OPCODE default Unknown::unknown() { 0x0f: stq_u({{ EA = (Rb + disp) & ~7; }}, {{ Mem.uq = Ra.uq; }}); 0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }}); 0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }}); + 0x24: copy_store({{EA = Rb;}}, + {{memAccessObj->copy(EA);}}, + IsMemRef, IsStore, IsCopy); } format StoreCond { diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 2b881509c8..4bdc69ad13 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -246,6 +246,17 @@ class SimpleCPU : public BaseCPU { // need to do this... } + + void copySrcTranslate(Addr src) + { + panic("Haven't implemented Copy Src translate yet in SimpleCPU\n"); + } + + void copy(Addr dest) + { + panic("Haven't implemented Copy yet in SimpleCPU\n"); + } + }; #endif // __SIMPLE_CPU_HH__ From c79deda8cd404565bbd277e67b3533b6c13fac74 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Sat, 28 Feb 2004 17:21:32 -0500 Subject: [PATCH 38/85] Fix handling of rpcc in full-system mode. arch/alpha/ev5.cc: Handle writing IPR_CC and IPR_CC_CTL slightly more intelligently. (Very slightly). arch/alpha/isa_desc: Upper half of rpcc result comes from value written to IPR_CC, not actual cycle counter. --HG-- extra : convert_revision : 7161989db8a3f040d0558e2e5a1a162ed1cb4125 --- arch/alpha/ev5.cc | 16 ++++++++++++++-- arch/alpha/isa_desc | 9 ++++++++- 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index aaa81a58d8..96c51a2aaa 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -329,13 +329,25 @@ ExecContext::setIpr(int idx, uint64_t val) case AlphaISA::IPR_PAL_BASE: case AlphaISA::IPR_IC_PERR_STAT: case AlphaISA::IPR_DC_PERR_STAT: - case AlphaISA::IPR_CC_CTL: - case AlphaISA::IPR_CC: case AlphaISA::IPR_PMCTR: // write entire quad w/ no side-effect ipr[idx] = val; break; + case AlphaISA::IPR_CC_CTL: + // This IPR resets the cycle counter. We assume this only + // happens once... let's verify that. + assert(ipr[idx] == 0); + ipr[idx] = 1; + break; + + case AlphaISA::IPR_CC: + // This IPR only writes the upper 64 bits. It's ok to write + // all 64 here since we mask out the lower 32 in rpcc (see + // isa_desc). + ipr[idx] = val; + break; + case AlphaISA::IPR_PALtemp23: // write entire quad w/ no side-effect ipr[idx] = val; diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 46fb306a4f..c4d367211e 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -2388,7 +2388,14 @@ decode OPCODE default Unknown::unknown() { } format BasicOperate { - 0xc000: rpcc({{ Ra = curTick; }}); + 0xc000: rpcc({{ +#ifdef FULL_SYSTEM + uint64_t cc = xc->readIpr(AlphaISA::IPR_CC, fault); + Ra = (cc<63:32> | curTick<31:0>); +#else + Ra = curTick; +#endif + }}); // All of the barrier instructions below do nothing in // their execute() methods (hence the empty code blocks). From 27960f6d858e92572d37604e92747d0b45591665 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 14:54:52 -0500 Subject: [PATCH 39/85] fix rpcc arch/alpha/ev5.cc: actually implement the cycle count register arch/alpha/isa_desc: the rpcc instruction really just reads the cycle count register --HG-- extra : convert_revision : a0edec85672377a62b90950efc17b62b375220b1 --- arch/alpha/ev5.cc | 5 +++++ arch/alpha/isa_desc | 3 +-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 96c51a2aaa..551cbdabfd 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -237,6 +237,11 @@ ExecContext::readIpr(int idx, Fault &fault) retval = ipr[idx]; break; + case AlphaISA::IPR_CC: + retval |= ipr[idx] & ULL(0xffffffff00000000); + retval |= curTick & ULL(0x00000000ffffffff); + break; + case AlphaISA::IPR_VA: // SFX: unlocks interrupt status registers retval = ipr[idx]; diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index c4d367211e..0cfe5b4525 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -2390,8 +2390,7 @@ decode OPCODE default Unknown::unknown() { format BasicOperate { 0xc000: rpcc({{ #ifdef FULL_SYSTEM - uint64_t cc = xc->readIpr(AlphaISA::IPR_CC, fault); - Ra = (cc<63:32> | curTick<31:0>); + Ra = xc->readIpr(AlphaISA::IPR_CC, fault); #else Ra = curTick; #endif From b491bda24145ffc9ce71a1d79b7b90926f910570 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Sun, 29 Feb 2004 16:18:49 -0500 Subject: [PATCH 40/85] Add support for multiple address ranges in memory interfaces. dev/alpha_console.cc: setAddrRange -> addAddrRange --HG-- extra : convert_revision : 9dc853b80bea443b54a130ca4c110a68077cb336 --- dev/alpha_console.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 85b4d57f28..04046557a8 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -63,7 +63,7 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, if (bus) { pioInterface = newPioInterface(name, hier, bus, this, &AlphaConsole::cacheAccess); - pioInterface->setAddrRange(addr, addr + size); + pioInterface->addAddrRange(addr, addr + size); } consoleData = new uint8_t[size]; From 2272164d6652c554fb3bab7bddfd0d53151e4115 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 17:05:23 -0500 Subject: [PATCH 41/85] Fix dumping to work on the opteron. struct timeval can vary in size, so we're explicit about the fields. --HG-- extra : convert_revision : e5264849dafb878676b2bfd3a6e6f95f6f94ea48 --- dev/etherdump.cc | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/dev/etherdump.cc b/dev/etherdump.cc index 23b3d778e2..b6d6bbe302 100644 --- a/dev/etherdump.cc +++ b/dev/etherdump.cc @@ -34,6 +34,7 @@ #include +#include "base/misc.hh" #include "dev/etherdump.hh" #include "sim/builder.hh" #include "sim/universe.hh" @@ -63,7 +64,8 @@ struct pcap_file_header { }; struct pcap_pkthdr { - struct timeval ts; // time stamp + uint32_t seconds; + uint32_t microseconds; uint32_t caplen; // length of portion present uint32_t len; // length this packet (off wire) }; @@ -96,8 +98,8 @@ EtherDump::init() * to sim_cycles. */ pcap_pkthdr pkthdr; - pkthdr.ts.tv_sec = curtime; - pkthdr.ts.tv_usec = 0; + pkthdr.seconds = curtime; + pkthdr.microseconds = 0; pkthdr.caplen = 0; pkthdr.len = 0; stream.write(reinterpret_cast(&pkthdr), sizeof(pkthdr)); @@ -109,8 +111,8 @@ void EtherDump::dumpPacket(PacketPtr &packet) { pcap_pkthdr pkthdr; - pkthdr.ts.tv_sec = curtime + (curTick / s_freq); - pkthdr.ts.tv_usec = (curTick / us_freq) % ULL(1000000); + pkthdr.seconds = curtime + (curTick / s_freq); + pkthdr.microseconds = (curTick / us_freq) % ULL(1000000); pkthdr.caplen = packet->length; pkthdr.len = packet->length; stream.write(reinterpret_cast(&pkthdr), sizeof(pkthdr)); From 31f82cef41962fb57d343f4a8cd468c87d8204dc Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 18:49:44 -0500 Subject: [PATCH 42/85] Make the progress event work even after restoring from a checkpoint --HG-- extra : convert_revision : 80e31eb26250700ebe3ce5848e570068cc76ef47 --- sim/sim_events.cc | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/sim/sim_events.cc b/sim/sim_events.cc index a31da18ddf..f7b07359c0 100644 --- a/sim/sim_events.cc +++ b/sim/sim_events.cc @@ -28,11 +28,13 @@ #include -#include "sim/param.hh" -#include "sim/eventq.hh" +#include "base/callback.hh" #include "base/hostinfo.hh" +#include "sim/eventq.hh" +#include "sim/param.hh" #include "sim/sim_events.hh" #include "sim/sim_exit.hh" +#include "sim/sim_init.hh" #include "sim/sim_stats.hh" using namespace std; @@ -178,7 +180,7 @@ class ProgressEvent : public Event ProgressEvent::ProgressEvent(EventQueue *q, Tick _interval) : Event(q), interval(_interval) { - schedule(interval); + schedule(curTick + interval); } // @@ -221,10 +223,24 @@ ProgressParamContext progessMessageParams("progress"); Param progress_interval(&progessMessageParams, "cycle", "cycle interval for progress messages"); +namespace { + struct SetupProgress : public Callback + { + Tick interval; + SetupProgress(Tick tick) : interval(tick) {} + + virtual void process() + { + new ProgressEvent(&mainEventQueue, interval); + delete this; + } + }; +} + /* check execute options */ void ProgressParamContext::checkParams() { if (progress_interval.isValid()) - new ProgressEvent(&mainEventQueue, progress_interval); + registerInitCallback(new SetupProgress(progress_interval)); } From 45f377bcd8c07b100aacc2de07023c836af04174 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 19:29:30 -0500 Subject: [PATCH 43/85] more debugging support base/trace.cc: code to set/clear/print trace flags from the debugger. --HG-- extra : convert_revision : f2a549e9af05c4a177186b9f1792a0493ce15c95 --- base/trace.cc | 63 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/base/trace.cc b/base/trace.cc index cca58d669f..e56bdb11b4 100644 --- a/base/trace.cc +++ b/base/trace.cc @@ -319,3 +319,66 @@ echoTrace(bool on) } } } + +extern "C" +void +printTraceFlags() +{ + using namespace Trace; + for (int i = 0; i < numFlagStrings; ++i) + if (flags[i]) + cprintf("%s\n", flagStrings[i]); +} + +void +tweakTraceFlag(const char *string, bool value) +{ + using namespace Trace; + std::string str(string); + + for (int i = 0; i < numFlagStrings; ++i) { + if (str != flagStrings[i]) + continue; + + int idx = i; + + if (idx < NumFlags) { + flags[idx] = value; + } else { + idx -= NumFlags; + if (idx >= NumCompoundFlags) { + ccprintf(cerr, "Invalid compound flag"); + return; + } + + const Flags *flagVec = compoundFlags[idx]; + + for (int j = 0; flagVec[j] != -1; ++j) { + if (flagVec[j] >= NumFlags) { + ccprintf(cerr, "Invalid compound flag"); + return; + } + flags[flagVec[j]] = value; + } + } + + cprintf("flag %s was %s\n", string, value ? "set" : "cleared"); + return; + } + + cprintf("could not find flag %s\n", string); +} + +extern "C" +void +setTraceFlag(const char *string) +{ + tweakTraceFlag(string, true); +} + +extern "C" +void +clearTraceFlag(const char *string) +{ + tweakTraceFlag(string, false); +} From ee967995196739b90c0b1c384d7e245d1dffdc80 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 20:22:32 -0500 Subject: [PATCH 44/85] Initial cleanup pass of lisa's function call tracking code. base/statistics.hh: We're getting rid of FS_MEASURE, but for now, we're going to still use a compile time flag to turn on and off binning of statistics. (The flag is STATS_BINNING) cpu/exec_context.cc: cpu/exec_context.hh: kern/tru64/tru64_system.cc: get rid of FS_MEASURE cpu/simple_cpu/simple_cpu.cc: yank the function call tracking code out of the cpu and move it into the software context class itself. kern/tru64/tru64_system.hh: get rid of FS_MEASURE move all of the tacking stuff to the same place. sim/system.hh: cleanup --HG-- extra : convert_revision : 73d3843afe1b3ba0d5445421c39c1148d3f4e7c0 --- base/statistics.hh | 2 +- cpu/exec_context.cc | 5 +--- cpu/exec_context.hh | 6 ----- cpu/simple_cpu/simple_cpu.cc | 29 ++++----------------- kern/tru64/tru64_system.cc | 4 +-- kern/tru64/tru64_system.hh | 23 +++++++---------- sim/system.hh | 49 ++++++++++++++++-------------------- 7 files changed, 38 insertions(+), 80 deletions(-) diff --git a/base/statistics.hh b/base/statistics.hh index 71d2aa8c8a..c99aadab5e 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -2498,7 +2498,7 @@ struct NoBin * binned. If the typedef is NoBin, nothing is binned. If it is * MainBin, then all stats are binned under that Bin. */ -#ifdef FS_MEASURE +#if defined(STATS_BINNING) typedef MainBin DefaultBin; #else typedef NoBin DefaultBin; diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 6a5f463cdc..b0ebb9622d 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -48,10 +48,7 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys, kernelStats(this, _cpu), cpu(_cpu), thread_num(_thread_num), cpu_id(-1), mem(_mem), itb(_itb), dtb(_dtb), system(_sys), memCtrl(_sys->memCtrl), physmem(_sys->physmem), -#ifdef FS_MEASURE - swCtx(NULL), -#endif - func_exe_inst(0), storeCondFailures(0) + swCtx(NULL), func_exe_inst(0), storeCondFailures(0) { memset(®s, 0, sizeof(RegFile)); } diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index e9dc5efecc..a4bbdd4843 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -45,10 +45,7 @@ class MemoryController; #include "kern/tru64/kernel_stats.hh" #include "sim/system.hh" - -#ifdef FS_MEASURE #include "sim/sw_context.hh" -#endif #else // !FULL_SYSTEM @@ -137,10 +134,7 @@ class ExecContext MemoryController *memCtrl; PhysicalMemory *physmem; -#ifdef FS_MEASURE SWContext *swCtx; -#endif - #else Process *process; diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 721861dd5e..c25a957757 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -675,32 +675,13 @@ SimpleCPU::tick() xc->func_exe_inst++; fault = si->execute(this, xc, traceData); -#ifdef FS_MEASURE - if (!(xc->misspeculating()) && (xc->system->bin)) { - SWContext *ctx = xc->swCtx; - if (ctx && !ctx->callStack.empty()) { - if (si->isCall()) { - ctx->calls++; - } - if (si->isReturn()) { - if (ctx->calls == 0) { - fnCall *top = ctx->callStack.top(); - DPRINTF(TCPIP, "Removing %s from callstack.\n", top->name); - delete top; - ctx->callStack.pop(); - if (ctx->callStack.empty()) - xc->system->nonPath->activate(); - else - ctx->callStack.top()->myBin->activate(); - xc->system->dumpState(xc); - } else { - ctx->calls--; - } - } - } - } +#ifdef FULL_SYSTEM + SWContext *ctx = xc->swCtx; + if (ctx) + ctx->process(xc, si.get()); #endif + if (si->isMemRef()) { numMemRefs++; } diff --git a/kern/tru64/tru64_system.cc b/kern/tru64/tru64_system.cc index 1cd98fdc17..13f28beabe 100644 --- a/kern/tru64/tru64_system.cc +++ b/kern/tru64/tru64_system.cc @@ -604,7 +604,6 @@ Tru64System::breakpoint() return remoteGDB[0]->trap(ALPHA_KENTRY_INT); } -#ifdef FS_MEASURE void Tru64System::populateMap(std::string callee, std::string caller) { @@ -646,7 +645,6 @@ Tru64System::dumpState(ExecContext *xc) const } } } -#endif //FS_MEASURE BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tru64System) @@ -672,7 +670,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(Tru64System) INIT_PARAM(console_code, "file that contains the console code"), INIT_PARAM(pal_code, "file that contains palcode"), INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot", - "a") + "a") END_INIT_SIM_OBJECT_PARAMS(Tru64System) diff --git a/kern/tru64/tru64_system.hh b/kern/tru64/tru64_system.hh index 93cc908e33..bedf1f3838 100644 --- a/kern/tru64/tru64_system.hh +++ b/kern/tru64/tru64_system.hh @@ -29,15 +29,12 @@ #ifndef __TRU64_SYSTEM_HH__ #define __TRU64_SYSTEM_HH__ +#include #include #include "sim/system.hh" #include "targetarch/isa_traits.hh" -#ifdef FS_MEASURE -#include -#endif - class ExecContext; class EcoffObject; class SymbolTable; @@ -48,9 +45,7 @@ class SkipFuncEvent; class PrintfEvent; class DebugPrintfEvent; class DumpMbufEvent; -#ifdef FS_MEASURE class FnEvent; -#endif class AlphaArguments; class Tru64System : public System @@ -150,11 +145,6 @@ class Tru64System : public System Addr kernelEntry; bool bin; -#ifdef FS_MEASURE - std::multimap callerMap; - void populateMap(std::string caller, std::string callee); -#endif - public: std::vector remoteGDB; std::vector gdbListen; @@ -168,7 +158,7 @@ class Tru64System : public System const std::string &console_path, const std::string &palcode, const std::string &boot_osflags, - const bool _bin); + const bool _bin); ~Tru64System(); int registerExecContext(ExecContext *xc); @@ -182,10 +172,15 @@ class Tru64System : public System static void Printf(AlphaArguments args); static void DumpMbuf(AlphaArguments args); -#ifdef FS_MEASURE + + // Lisa's fs measure stuff + private: + std::multimap callerMap; + void populateMap(std::string caller, std::string callee); + + public: bool findCaller(std::string callee, std::string caller) const; void dumpState(ExecContext *xc) const; -#endif //FS_MEASURE }; #endif // __TRU64_SYSTEM_HH__ diff --git a/sim/system.hh b/sim/system.hh index 8348a144e5..2e0cb3dbfc 100644 --- a/sim/system.hh +++ b/sim/system.hh @@ -32,14 +32,11 @@ #include #include -#include "sim/sim_object.hh" -#include "cpu/pc_event.hh" #include "base/loader/symtab.hh" - -#ifdef FS_MEASURE #include "base/statistics.hh" +#include "cpu/pc_event.hh" +#include "sim/sim_object.hh" #include "sim/sw_context.hh" -#endif class MemoryController; class PhysicalMemory; @@ -50,11 +47,28 @@ class ExecContext; class System : public SimObject { -#ifdef FS_MEASURE + // lisa's binning stuff protected: std::map fnBins; std::map swCtxMap; -#endif //FS_MEASURE + + public: + Statistics::Scalar fnCalls; + Statistics::MainBin *nonPath; + + Statistics::MainBin * getBin(const std::string &name); + virtual bool findCaller(std::string, std::string) const = 0; + + SWContext *findContext(Addr pcb); + bool addContext(Addr pcb, SWContext *ctx) { + return (swCtxMap.insert(make_pair(pcb, ctx))).second; + } + void remContext(Addr pcb) { + swCtxMap.erase(pcb); + return; + } + + virtual void dumpState(ExecContext *xc) const = 0; public: const uint64_t init_param; @@ -69,11 +83,6 @@ class System : public SimObject virtual int registerExecContext(ExecContext *xc); virtual void replaceExecContext(int xcIndex, ExecContext *xc); -#ifdef FS_MEASURE - Statistics::Scalar fnCalls; - Statistics::MainBin *nonPath; -#endif //FS_MEASURE - public: System(const std::string _name, const uint64_t _init_param, MemoryController *, PhysicalMemory *, const bool); @@ -84,22 +93,6 @@ class System : public SimObject virtual Addr getKernelEntry() const = 0; virtual bool breakpoint() = 0; -#ifdef FS_MEASURE - Statistics::MainBin * getBin(const std::string &name); - virtual bool findCaller(std::string, std::string) const = 0; - - SWContext *findContext(Addr pcb); - bool addContext(Addr pcb, SWContext *ctx) { - return (swCtxMap.insert(make_pair(pcb, ctx))).second; - } - void remContext(Addr pcb) { - swCtxMap.erase(pcb); - return; - } - - virtual void dumpState(ExecContext *xc) const = 0; -#endif //FS_MEASURE - public: //////////////////////////////////////////// // From 47421b844299a6b5ecd6d3f4a75a516c5b00447a Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 20:32:30 -0500 Subject: [PATCH 45/85] fix switchover WRT interrupts cpu/base_cpu.cc: gah! copy the interrupt status on switchover --HG-- extra : convert_revision : d3199a7409a494b7687354c43ffca697f37e8456 --- cpu/base_cpu.cc | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 604ee335d3..19dd115987 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -184,6 +184,10 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) newXC->process->replaceExecContext(newXC->cpu_id, newXC); #endif } + + for (int i = 0; i < NumInterruptLevels; ++i) + interrupts[i] = oldCPU->interrupts[i]; + intstatus = oldCPU->intstatus; } From 27b926c431dae477eff22ea5c0f6648616330219 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 20:35:55 -0500 Subject: [PATCH 46/85] Avoid more bogus addresses --HG-- extra : convert_revision : 25bc2adb78e2f96fb28b352a73401c3fa52eab03 From ff516e8362ef92ab3c86cc6fb163fe960b38f6ed Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 20:38:25 -0500 Subject: [PATCH 47/85] mark the request satisfied since well, it is. --HG-- extra : convert_revision : 667c477b0b5ca45d63eaecabcf5119701584599f From 133375d5b159b2e6cefa48e4f3b3269ab1c379f8 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 21:34:25 -0500 Subject: [PATCH 48/85] make it so that we can prevent descriptor DMAs or data DMAs from touching the memory system. They can still have a latency though if configured. --HG-- extra : convert_revision : d372205643bd46f7fb7d50a20569ac74ae37ce38 From 7f688ba6a97808290aa5fcaaa4ff8c383d191830 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 21:35:12 -0500 Subject: [PATCH 49/85] unused function name --HG-- extra : convert_revision : ef2994f2d18a36580994b4fa7005e6dceb072b31 From cbc42f1d71323fa94ad2b5262258c1d6b1c0b0bf Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Sun, 29 Feb 2004 22:41:11 -0500 Subject: [PATCH 50/85] Remove copys from isa_desc, and implement a store and forward bus bridge arch/alpha/isa_desc: Just to make sure, remove the new copy instructions until everything works. --HG-- extra : convert_revision : cdd3d4c8fa415175aaee04f4a99340dcf82dbc3a --- arch/alpha/isa_desc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 0cfe5b4525..a7665210fc 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1854,9 +1854,9 @@ decode OPCODE default Unknown::unknown() { 0x23: ldt({{ EA = Rb + disp; }}, {{ Fa = Mem.df; }}); 0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED); 0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED); - 0x20: copy_load({{EA = Ra;}}, - {{memAccessObj->copySrcTranslate(EA);}}, - IsMemRef, IsLoad, IsCopy); + //0x20: copy_load({{EA = Ra;}}, + // {{memAccessObj->copySrcTranslate(EA);}}, + // IsMemRef, IsLoad, IsCopy); } format LoadOrPrefetch { @@ -1876,9 +1876,9 @@ decode OPCODE default Unknown::unknown() { 0x0f: stq_u({{ EA = (Rb + disp) & ~7; }}, {{ Mem.uq = Ra.uq; }}); 0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }}); 0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }}); - 0x24: copy_store({{EA = Rb;}}, - {{memAccessObj->copy(EA);}}, - IsMemRef, IsStore, IsCopy); + //0x24: copy_store({{EA = Rb;}}, + // {{memAccessObj->copy(EA);}}, + // IsMemRef, IsStore, IsCopy); } format StoreCond { From 31ccbde8299239718ba5fc45387c30d5ccb045a7 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 22:56:42 -0500 Subject: [PATCH 51/85] Fix the swichover code. It's only for FULL_SYSTEM cpu/base_cpu.cc: #ifdef FULL_SYSTEM --HG-- extra : convert_revision : 427ee93d545596da00d6c4688a7e32d584054948 --- cpu/base_cpu.cc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 19dd115987..367662f259 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -185,9 +185,11 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) #endif } +#ifdef FULL_SYSTEM for (int i = 0; i < NumInterruptLevels; ++i) interrupts[i] = oldCPU->interrupts[i]; intstatus = oldCPU->intstatus; +#endif } From 19c25e7c21012d7a923446e41e674e8333605116 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Sun, 29 Feb 2004 23:13:04 -0500 Subject: [PATCH 52/85] Fix an assert, only need the ExecContext if we are doing data, --HG-- extra : convert_revision : 07f674613cb39ffe77dd66c2c9a77ed73b9d75b6 From 2aed8753dd34f9bf4d92ff8c6f33291aad1d884c Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 1 Mar 2004 16:17:18 -0500 Subject: [PATCH 53/85] Only need an execution context if we're doing data --HG-- extra : convert_revision : 389a02fbf2f266e0c5e8ae07fd28138f7ebfc80c From 7a9cf40bbf00752d7a29e3ea1f8bb3b55965f643 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 1 Mar 2004 16:18:02 -0500 Subject: [PATCH 54/85] add support for averaging --HG-- extra : convert_revision : f0b5f622f96795a5d2160eeb2b52ecfd83170b67 From ad2f3f3a63e09bf807c72253508a0344cf00f47c Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 1 Mar 2004 16:19:12 -0500 Subject: [PATCH 55/85] Support several memory configurations for hooking up devices to memory in different configurations --HG-- extra : convert_revision : 9e31c2fa96eeb42160cc0b892e10e6db58fe786b From 18d90037cb1a853cd1339d49cafab0fdd73c6125 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 1 Mar 2004 16:22:09 -0500 Subject: [PATCH 56/85] Use #define CPU_10GHZ and CPU_4GHZ. This should get fixed when we switch over to making ticks represent time directly. --HG-- extra : convert_revision : 29e76e909a184e1ba005a98dd80ca5da1d345f3e From eabc59ca2d130cb4069a3cfa20ce30ff46bab0c9 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 1 Mar 2004 16:22:51 -0500 Subject: [PATCH 57/85] Initial cut at adding support to make the state machine take time --HG-- extra : convert_revision : f30ab2f00dd6f00ad8020912e709d057a2875526 From 3a0db71f02a4aa96f8ff47a02debb78a0d53b80d Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Mon, 1 Mar 2004 21:17:28 -0500 Subject: [PATCH 58/85] Add support for two buses to the DMA, allows header splitting The two busses are labeled header/payload. The header_size designates the number of cache blocks to send on the header bus. --HG-- extra : convert_revision : 930411052d2183311f9be7a10087c77552a35b37 From 9be01eec9a63cc1d2530b9c0aa8a1d85a40cae60 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Mon, 1 Mar 2004 21:38:33 -0500 Subject: [PATCH 59/85] Change ini again because I messed up the resolve --HG-- extra : convert_revision : f46902ec51e0db3f4dcfedc4937c8f9504074463 From 9cd698000cacf103c8871fbacffb64c47c466695 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Tue, 2 Mar 2004 01:04:12 -0500 Subject: [PATCH 60/85] Add statistics to calculate average round-trip delay for DMA --HG-- extra : convert_revision : 1aa436e4dc2981444b4aab102c24c99f5b3280cd From c92a09e2131974882b2fb34df5e9f622d2a669a9 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Tue, 2 Mar 2004 02:21:15 -0500 Subject: [PATCH 61/85] Add a name parameter so the statistics work properly --HG-- extra : convert_revision : 5ea9d5c5f0a0e19afe6956e004113d87d347d698 From 594d7d028d62076c931e60aa6878de4600d58d84 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Tue, 2 Mar 2004 02:49:19 -0500 Subject: [PATCH 62/85] Add more statistics about dma requests, shorten names for easier readability of stats --HG-- extra : convert_revision : 052a03c3e7a6b4b4ee000f291332bdec59c94f96 From b05d7f99acd739bcdbc9ed141783ae98b9fbc903 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Tue, 2 Mar 2004 12:59:24 -0500 Subject: [PATCH 63/85] Make sure to arbitrate for the payload bus in the header splitting case, and to free up the header bus by returning false. If there is no header splitting it will work normally. --HG-- extra : convert_revision : 4f6dd07e33e510502806256b1b8089d85d600233 From 430a1700c661c89163fb4c3c30029b41a985a457 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Tue, 2 Mar 2004 15:13:01 -0500 Subject: [PATCH 64/85] Reduce redundant code, fix so that if the dma request is only as big as the header, and fix so that it doesn't keep requesting the payload bus if the sendRequest was unsuccesful. --HG-- extra : convert_revision : 7fda85ccf38ea99a457ae0d6902704cb2ba053cd From 5537f02d49018383650b4f576baba1e35ec1f233 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Tue, 2 Mar 2004 18:45:08 -0500 Subject: [PATCH 65/85] Add some stats to track latencies of small and large DMA transactions. --HG-- extra : convert_revision : 1792d396f00bd24e9577f7883461b389e96ef803 From b91ea433b9921e07c39d53cec3d37a5fdc9353a9 Mon Sep 17 00:00:00 2001 From: Andrew Schultz Date: Tue, 2 Mar 2004 22:02:33 -0500 Subject: [PATCH 66/85] Script and ini file for new specweb images (the threaded ones) --HG-- extra : convert_revision : 82f66462bb2607e427db40147d7f8cc705ed3853 From 7c089b2001afb93fe51b1a89456b15fd0d00c794 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Thu, 4 Mar 2004 14:57:57 -0500 Subject: [PATCH 67/85] Copy implementations arch/alpha/isa_desc: Need to return fault for copy operations. cpu/exec_context.hh: Add temporary storage to pass source address from copy load to copy store cpu/simple_cpu/simple_cpu.cc: Implement copy functions. cpu/simple_cpu/simple_cpu.hh: Return fault --HG-- extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90 --- arch/alpha/isa_desc | 4 ++-- cpu/exec_context.hh | 12 +++++++++++ cpu/simple_cpu/simple_cpu.cc | 40 ++++++++++++++++++++++++++++++++++++ cpu/simple_cpu/simple_cpu.hh | 11 ++-------- 4 files changed, 56 insertions(+), 11 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 46fb306a4f..41f7388e08 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1855,7 +1855,7 @@ decode OPCODE default Unknown::unknown() { 0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED); 0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED); 0x20: copy_load({{EA = Ra;}}, - {{memAccessObj->copySrcTranslate(EA);}}, + {{fault = memAccessObj->copySrcTranslate(EA);}}, IsMemRef, IsLoad, IsCopy); } @@ -1877,7 +1877,7 @@ decode OPCODE default Unknown::unknown() { 0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }}); 0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }}); 0x24: copy_store({{EA = Rb;}}, - {{memAccessObj->copy(EA);}}, + {{fault =memAccessObj->copy(EA);}}, IsMemRef, IsStore, IsCopy); } diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index e9dc5efecc..ccb01f486a 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -153,6 +153,18 @@ class ExecContext #endif + /** + * Temporary storage to pass the source address from copy_load to + * copy_store. + * @todo Remove this temporary when we have a better way to do it. + */ + Addr copySrcAddr; + /** + * Temp storage for the physical source address of a copy. + * @todo Remove this temporary when we have a better way to do it. + */ + Addr copySrcPhysAddr; + /* * number of executed instructions, for matching with syscall trace diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 721861dd5e..2553bd22a6 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -327,6 +327,46 @@ change_thread_state(int thread_number, int activate, int priority) { } +Fault +SimpleCPU::copySrcTranslate(Addr src) +{ + memReq->reset(src, (dcacheInterface) ? + dcacheInterface->getBlockSize() + : 64); + + // translate to physical address + Fault fault = xc->translateDataReadReq(memReq); + + if (fault == No_Fault) { + xc->copySrcAddr = src; + xc->copySrcPhysAddr = memReq->paddr; + } else { + xc->copySrcAddr = 0; + xc->copySrcPhysAddr = 0; + } + return fault; +} + +Fault +SimpleCPU::copy(Addr dest) +{ + int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64; + uint8_t data[blk_size]; + assert(xc->copySrcPhysAddr); + memReq->reset(dest, blk_size); + // translate to physical address + Fault fault = xc->translateDataWriteReq(memReq); + if (fault == No_Fault) { + Addr dest_addr = memReq->paddr; + // Need to read straight from memory since we have more than 8 bytes. + memReq->paddr = xc->copySrcPhysAddr; + xc->mem->read(memReq, data); + memReq->paddr = dest_addr; + xc->mem->write(memReq, data); + } + return fault; +} + // precise architected memory state accessor macros template Fault diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 4bdc69ad13..9edd66ab41 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -247,16 +247,9 @@ class SimpleCPU : public BaseCPU // need to do this... } - void copySrcTranslate(Addr src) - { - panic("Haven't implemented Copy Src translate yet in SimpleCPU\n"); - } - - void copy(Addr dest) - { - panic("Haven't implemented Copy yet in SimpleCPU\n"); - } + Fault copySrcTranslate(Addr src); + Fault copy(Addr dest); }; #endif // __SIMPLE_CPU_HH__ From 1d09cd71a411a6f4e81fe60a2b180d8b5aa5de86 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Thu, 4 Mar 2004 20:03:38 -0500 Subject: [PATCH 68/85] Reenable functioning copies. arch/alpha/isa_desc: Reenable copies. --HG-- extra : convert_revision : 99259c0ff65e742e617cba1c14f5d1bf4be2fee8 --- arch/alpha/isa_desc | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 56e7cb31c9..0da087f975 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1854,10 +1854,9 @@ decode OPCODE default Unknown::unknown() { 0x23: ldt({{ EA = Rb + disp; }}, {{ Fa = Mem.df; }}); 0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED); 0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED); - {{fault = memAccessObj->copySrcTranslate(EA);}}, - //0x20: copy_load({{EA = Ra;}}, - // {{memAccessObj->copySrcTranslate(EA);}}, - // IsMemRef, IsLoad, IsCopy); + 0x20: copy_load({{EA = Ra;}}, + {{ fault = memAccessObj->copySrcTranslate(EA);}}, + IsMemRef, IsLoad, IsCopy); } format LoadOrPrefetch { @@ -1877,10 +1876,9 @@ decode OPCODE default Unknown::unknown() { 0x0f: stq_u({{ EA = (Rb + disp) & ~7; }}, {{ Mem.uq = Ra.uq; }}); 0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }}); 0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }}); - {{fault =memAccessObj->copy(EA);}}, - //0x24: copy_store({{EA = Rb;}}, - // {{memAccessObj->copy(EA);}}, - // IsMemRef, IsStore, IsCopy); + 0x24: copy_store({{EA = Rb;}}, + {{ fault = memAccessObj->copy(EA);}}, + IsMemRef, IsStore, IsCopy); } format StoreCond { From f3861d0cc7d3574f985b3aeb37ddf6038b6c9a11 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Thu, 4 Mar 2004 21:57:09 -0500 Subject: [PATCH 69/85] Overall gist of this is to 'dynamicize' the tracking of functions so you can choose them at the .ini stage rather than at compile time. to do it: in .ini file set binned_fns=foo null bar foo what this says is, track foo when it is called by null (i.e. anything). bin bar only when it is called by foo. essentially, if you have a path of functions to track, the 0th, 2nd, 4th fn listed are the fns to track, and the 1st, 3rd, 5th are their respective callers. base/statistics.hh: turn it back to FS_MEASURE since we already have a build in place kern/tru64/tru64_events.cc: remove FS_MEASURE #defs. add more DPRINTF's. manage an anomaly that happens when tracking idle_thread. kern/tru64/tru64_events.hh: remove FS_MEASURE #defs kern/tru64/tru64_system.cc: make DumpState print all the time, but only with DPRINTF. add a new parameter to tru64System a vector binned_fns, to read in from .ini file. now all this binning stuff is dynamically generated. kern/tru64/tru64_system.hh: remove all static binning stuff, add support for dynamic sim/system.cc: change nonPath bin name to Kernel, remove FS_MEASURE sim/system.hh: change nonPath to Kernel --HG-- extra : convert_revision : 9ee813c0a64273bab4125815b7bc8145c5897ec1 --- base/statistics.hh | 2 +- kern/tru64/tru64_events.cc | 17 +- kern/tru64/tru64_events.hh | 4 - kern/tru64/tru64_system.cc | 418 ++++--------------------------------- kern/tru64/tru64_system.hh | 80 +------ sim/system.cc | 10 +- sim/system.hh | 2 +- 7 files changed, 61 insertions(+), 472 deletions(-) diff --git a/base/statistics.hh b/base/statistics.hh index c99aadab5e..0dad31a5a9 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -2498,7 +2498,7 @@ struct NoBin * binned. If the typedef is NoBin, nothing is binned. If it is * MainBin, then all stats are binned under that Bin. */ -#if defined(STATS_BINNING) +#if defined(FS_MEASURE) typedef MainBin DefaultBin; #else typedef NoBin DefaultBin; diff --git a/kern/tru64/tru64_events.cc b/kern/tru64/tru64_events.cc index f542256e44..e018cb242b 100644 --- a/kern/tru64/tru64_events.cc +++ b/kern/tru64/tru64_events.cc @@ -35,11 +35,8 @@ #include "kern/tru64/tru64_events.hh" #include "mem/functional_mem/memory_control.hh" #include "targetarch/arguments.hh" - -#ifdef FS_MEASURE #include "sim/system.hh" #include "sim/sw_context.hh" -#endif void SkipFuncEvent::process(ExecContext *xc) @@ -110,7 +107,6 @@ DumpMbufEvent::process(ExecContext *xc) } } -#ifdef FS_MEASURE FnEvent::FnEvent(PCEventQueue *q, const std::string & desc, System *system) : PCEvent(q, desc), _name(desc) { @@ -128,13 +124,23 @@ FnEvent::process(ExecContext *xc) DPRINTF(TCPIP, "%s: %s Event!!!\n", xc->system->name(), description); if (ctx && !ctx->callStack.empty()) { + DPRINTF(TCPIP, "already a callstack!\n"); fnCall *last = ctx->callStack.top(); + + if (last->name == "idle_thread") + ctx->calls++; + if (!xc->system->findCaller(myname(), last->name)) { + DPRINTF(TCPIP, "but can't find parent %s\n", last->name); return; } ctx->calls--; + + //assert(!ctx->calls && "on a binned fn, calls should == 0 (but can happen in boot)"); } else { + DPRINTF(TCPIP, "no callstack yet\n"); if (!xc->system->findCaller(myname(), "")) { + DPRINTF(TCPIP, "not the right function, returning\n"); return; } if (!ctx) { @@ -150,6 +156,7 @@ FnEvent::process(ExecContext *xc) ctx->callStack.push(call); myBin->activate(); xc->system->fnCalls++; + DPRINTF(TCPIP, "fnCalls for %s is %d\n", description, + xc->system->fnCalls.val()); xc->system->dumpState(xc); } -#endif //FS_MEASURE diff --git a/kern/tru64/tru64_events.hh b/kern/tru64/tru64_events.hh index 2067f2ef33..96e6a8b26b 100644 --- a/kern/tru64/tru64_events.hh +++ b/kern/tru64/tru64_events.hh @@ -35,9 +35,7 @@ class ExecContext; -#ifdef FS_MEASURE class System; -#endif class SkipFuncEvent : public PCEvent { @@ -82,7 +80,6 @@ class DumpMbufEvent : public PCEvent virtual void process(ExecContext *xc); }; -#ifdef FS_MEASURE class FnEvent : public PCEvent { public: @@ -94,5 +91,4 @@ class FnEvent : public PCEvent std::string _name; Statistics::MainBin *myBin; }; -#endif //FS_MEASURE #endif // __TRU64_EVENTS_HH__ diff --git a/kern/tru64/tru64_system.cc b/kern/tru64/tru64_system.cc index 13f28beabe..8df8cc86db 100644 --- a/kern/tru64/tru64_system.cc +++ b/kern/tru64/tru64_system.cc @@ -41,17 +41,15 @@ #include "targetarch/isa_traits.hh" #include "targetarch/vtophys.hh" -//un-comment this to see the state of call stack when it changes. -//#define SW_DEBUG - using namespace std; Tru64System::Tru64System(const string _name, const uint64_t _init_param, MemoryController *_memCtrl, PhysicalMemory *_physmem, const string &kernel_path, const string &console_path, const string &palcode, const string &boot_osflags, - const bool _bin) - : System(_name, _init_param, _memCtrl, _physmem, _bin), bin(_bin) + const bool _bin, const vector &binned_fns) + : System(_name, _init_param, _memCtrl, _physmem, _bin), bin(_bin), + binned_fns(binned_fns) { kernelSymtab = new SymbolTable; consoleSymtab = new SymbolTable; @@ -92,106 +90,6 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param, DPRINTF(Loader, "Kernel loaded...\n"); -#ifdef FS_MEASURE - //INSTRUMENTATION CODEGEN BEGIN ONE - if (bin == true) { - esIntrBin = new Statistics::MainBin(name() + " es_intr"); - fnBins.insert(make_pair("es_intr", esIntrBin)); - - esRxeofBin = new Statistics::MainBin(name() + " es_rxeof"); - fnBins.insert(make_pair("es_rxeof", esRxeofBin)); - - esNewbufBin = new Statistics::MainBin(name() + " es_newbuf"); - fnBins.insert(make_pair("es_newbuf", esNewbufBin)); - - esDmaLoadBin = new Statistics::MainBin(name() + " es_dma_load"); - fnBins.insert(make_pair("es_dma_load", esDmaLoadBin)); - - dmaMapLoadBin = new Statistics::MainBin(name() + " dma_map_load"); - fnBins.insert(make_pair("dma_map_load", dmaMapLoadBin)); - - etherInputBin = new Statistics::MainBin(name() + " ether_input"); - fnBins.insert(make_pair("ether_input", etherInputBin)); - - netisrInputBin = new Statistics::MainBin(name() + " netisr_input"); - fnBins.insert(make_pair("netisr_input", netisrInputBin)); - - schednetisrIsrBin = new Statistics::MainBin(name() + " schednetisr_isr"); - fnBins.insert(make_pair("schednetisr_isr", schednetisrIsrBin)); - - ipintrBin = new Statistics::MainBin(name() + " ipintr"); - fnBins.insert(make_pair("ipintr", ipintrBin)); - - ipDooptionsBin = new Statistics::MainBin(name() + " ip_dooptions"); - fnBins.insert(make_pair("ip_dooptions", ipDooptionsBin)); - - ipReassBin = new Statistics::MainBin(name() + " ip_reass"); - fnBins.insert(make_pair("ip_reass", ipReassBin)); - - tcpInputBin = new Statistics::MainBin(name() + " tcp_input"); - fnBins.insert(make_pair("tcp_input", tcpInputBin)); - - sbappendBin = new Statistics::MainBin(name() + " sbappend"); - fnBins.insert(make_pair("sbappend", sbappendBin)); - - readBin = new Statistics::MainBin(name() + " read"); - fnBins.insert(make_pair("read", readBin)); - - sooReadBin = new Statistics::MainBin(name() + " soo_read"); - fnBins.insert(make_pair("soo_read", sooReadBin)); - - orecvBin = new Statistics::MainBin(name() + " orecv"); - fnBins.insert(make_pair("orecv", orecvBin)); - - recvitBin = new Statistics::MainBin(name() + " recvit"); - fnBins.insert(make_pair("recvit", recvitBin)); - - soreceiveBin = new Statistics::MainBin(name() + " soreceive"); - fnBins.insert(make_pair("soreceive", soreceiveBin)); - - osendBin = new Statistics::MainBin(name() + " osend"); - fnBins.insert(make_pair("osend", osendBin)); - - writeBin = new Statistics::MainBin(name() + " write"); - fnBins.insert(make_pair("write", writeBin)); - - sooWriteBin = new Statistics::MainBin(name() + " soo_write"); - fnBins.insert(make_pair("soo_write", sooWriteBin)); - - senditBin = new Statistics::MainBin(name() + " sendit"); - fnBins.insert(make_pair("sendit", senditBin)); - - sosendBin = new Statistics::MainBin(name() + " sosend"); - fnBins.insert(make_pair("sosend", sosendBin)); - - tcpSosendBin = new Statistics::MainBin(name() + " tcp_sosend"); - fnBins.insert(make_pair("tcp_sosend", tcpSosendBin)); - - tcpOutputBin = new Statistics::MainBin(name() + " tcp_output"); - fnBins.insert(make_pair("tcp_output", tcpOutputBin)); - - ipOutputBin = new Statistics::MainBin(name() + " ip_output"); - fnBins.insert(make_pair("ip_output", ipOutputBin)); - - etherOutputBin = new Statistics::MainBin(name() + " ether_output"); - fnBins.insert(make_pair("ether_output", etherOutputBin)); - - esStartBin = new Statistics::MainBin(name() + " es_start"); - fnBins.insert(make_pair("es_start", esStartBin)); - - esTransmitBin = new Statistics::MainBin(name() + " es_transmit"); - fnBins.insert(make_pair("es_transmit", esTransmitBin)); - - esTxeofBin = new Statistics::MainBin(name() + " es_txeof"); - fnBins.insert(make_pair("es_txeof", esTxeofBin)); - - idleThreadBin = new Statistics::MainBin(name() + " idle_thread"); - fnBins.insert(make_pair("idle_thread", idleThreadBin)); - - } - //INSTRUMENTATION CODEGEN END -#endif //FS_MEASURE - #ifdef DEBUG kernelPanicEvent = new BreakPCEvent(&pcEventQueue, "kernel panic"); consolePanicEvent = new BreakPCEvent(&pcEventQueue, "console panic"); @@ -208,44 +106,6 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param, "debug_printfr", true); dumpMbufEvent = new DumpMbufEvent(&pcEventQueue, "dump_mbuf"); -#ifdef FS_MEASURE - //INSTRUMENTATION CODEGEN BEGIN TWO - if (bin == true) { - esIntrEvent = new FnEvent(&pcEventQueue, "es_intr", this); - esRxeofEvent = new FnEvent(&pcEventQueue, "es_rxeof", this); - esNewbufEvent = new FnEvent(&pcEventQueue, "es_newbuf", this); - esDmaLoadEvent = new FnEvent(&pcEventQueue, "es_dma_load", this); - dmaMapLoadEvent = new FnEvent(&pcEventQueue, "dma_map_load", this); - etherInputEvent = new FnEvent(&pcEventQueue, "ether_input", this); - netisrInputEvent = new FnEvent(&pcEventQueue, "netisr_input", this); - schednetisrIsrEvent = new FnEvent(&pcEventQueue, "schednetisr_isr", this); - ipintrEvent = new FnEvent(&pcEventQueue, "ipintr", this); - ipDooptionsEvent = new FnEvent(&pcEventQueue, "ip_dooptions", this); - ipReassEvent = new FnEvent(&pcEventQueue, "ip_reass", this); - tcpInputEvent = new FnEvent(&pcEventQueue, "tcp_input", this); - sbappendEvent = new FnEvent(&pcEventQueue, "sbappend", this); - readEvent = new FnEvent(&pcEventQueue, "read", this); - sooReadEvent = new FnEvent(&pcEventQueue, "soo_read", this); - orecvEvent = new FnEvent(&pcEventQueue, "orecv", this); - recvitEvent = new FnEvent(&pcEventQueue, "recvit", this); - soreceiveEvent = new FnEvent(&pcEventQueue, "soreceive", this); - osendEvent = new FnEvent(&pcEventQueue, "osend", this); - writeEvent = new FnEvent(&pcEventQueue, "write", this); - sooWriteEvent = new FnEvent(&pcEventQueue, "soo_write", this); - senditEvent = new FnEvent(&pcEventQueue, "sendit", this); - sosendEvent = new FnEvent(&pcEventQueue, "sosend", this); - tcpSosendEvent = new FnEvent(&pcEventQueue, "tcp_sosend", this); - tcpOutputEvent = new FnEvent(&pcEventQueue, "tcp_output", this); - ipOutputEvent = new FnEvent(&pcEventQueue, "ip_output", this); - etherOutputEvent = new FnEvent(&pcEventQueue, "ether_output", this); - esStartEvent = new FnEvent(&pcEventQueue, "es_start", this); - esTransmitEvent = new FnEvent(&pcEventQueue, "es_transmit", this); - esTxeofEvent = new FnEvent(&pcEventQueue, "es_txeof", this); - idleThreadEvent = new FnEvent(&pcEventQueue, "idle_thread", this); - } - //INSTRUMENTATION CODEGEN END -#endif //FS_MEASURE - Addr addr = 0; if (kernelSymtab->findAddress("enable_async_printf", addr)) { Addr paddr = vtophys(physmem, addr); @@ -299,212 +159,39 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param, dumpMbufEvent->schedule(addr); #endif -#ifdef FS_MEASURE - //INSTRUMENTATION CODEGEN BEGIN THREE + // BINNING STUFF if (bin == true) { - if (kernelSymtab->findAddress("es_intr", addr)) - esIntrEvent->schedule(addr); - else - panic("could not find kernel symbol \'es_intr\'"); + int end = binned_fns.size(); + assert(!(end & 1)); - if (kernelSymtab->findAddress("es_rxeof", addr)) - esRxeofEvent->schedule(addr); - else - panic("could not find kernel symbol \'es_rxeof\'"); + Statistics::MainBin *Bin; + Addr address = 0; - if (kernelSymtab->findAddress("es_newbuf", addr)) - esNewbufEvent->schedule(addr); - else - panic("could not find kernel symbol \'es_newbuf\'"); + fnEvents.resize(end>>1); - if (kernelSymtab->findAddress("es_dma_load", addr)) - esDmaLoadEvent->schedule(addr); - else - panic("could not find kernel symbol \'es_dma_load\'"); + for (int i = 0; i < end; i +=2) { + cout << "creating Bin for " << binned_fns[i] << endl; + Bin = new Statistics::MainBin(name() + " " + binned_fns[i]); + fnBins.insert(make_pair(binned_fns[i], Bin)); - if (kernelSymtab->findAddress("dma_map_load", addr)) - dmaMapLoadEvent->schedule(addr); - else - panic("could not find kernel symbol \'dma_map_load\'"); + fnEvents[(i>>1)] = new FnEvent(&pcEventQueue, binned_fns[i], this); + if (kernelSymtab->findAddress(binned_fns[i], address)) + fnEvents[(i>>1)]->schedule(address); + else + panic("could not find kernel symbol %s\n", binned_fns[i]); - if (kernelSymtab->findAddress("ether_input", addr)) - etherInputEvent->schedule(addr); - else - panic("could not find kernel symbol \'ether_input\'"); + if (binned_fns[i+1] == "null") + populateMap(binned_fns[i], ""); + else + populateMap(binned_fns[i], binned_fns[i+1]); + } - if (kernelSymtab->findAddress("netisr_input", addr)) - netisrInputEvent->schedule(addr); - else - panic("could not find kernel symbol \'netisr_input\'"); - - if (kernelSymtab->findAddress("schednetisr_isr", addr)) - schednetisrIsrEvent->schedule(addr); - else - panic("could not find kernel symbol \'schednetisr_isr\'"); - - if (kernelSymtab->findAddress("ipintr", addr)) - ipintrEvent->schedule(addr); - else - panic("could not find kernel symbol \'ipintr\'"); - - if (kernelSymtab->findAddress("ip_dooptions", addr)) - ipDooptionsEvent->schedule(addr); - else - panic("could not find kernel symbol \'ip_dooptions\'"); - - if (kernelSymtab->findAddress("ip_reass", addr)) - ipReassEvent->schedule(addr); - else - panic("could not find kernel symbol \'ip_reass\'"); - - if (kernelSymtab->findAddress("tcp_input", addr)) - tcpInputEvent->schedule(addr); - else - panic("could not find kernel symbol \'tcp_input\'"); - - if (kernelSymtab->findAddress("sbappend", addr)) - sbappendEvent->schedule(addr); - else - panic("could not find kernel symbol \'sbappend\'"); - - if (kernelSymtab->findAddress("read", addr)) - readEvent->schedule(addr); - else - panic("could not find kernel symbol \'read\'"); - - if (kernelSymtab->findAddress("soo_read", addr)) - sooReadEvent->schedule(addr); - else - panic("could not find kernel symbol \'soo_read\'"); - - if (kernelSymtab->findAddress("orecv", addr)) - orecvEvent->schedule(addr); - else - panic("could not find kernel symbol \'orecv\'"); - - if (kernelSymtab->findAddress("recvit", addr)) - recvitEvent->schedule(addr); - else - panic("could not find kernel symbol \'recvit\'"); - - if (kernelSymtab->findAddress("soreceive", addr)) - soreceiveEvent->schedule(addr); - else - panic("could not find kernel symbol \'soreceive\'"); - - if (kernelSymtab->findAddress("osend", addr)) - osendEvent->schedule(addr); - else - panic("could not find kernel symbol \'osend\'"); - - if (kernelSymtab->findAddress("write", addr)) - writeEvent->schedule(addr); - else - panic("could not find kernel symbol \'write\'"); - - if (kernelSymtab->findAddress("soo_write", addr)) - sooWriteEvent->schedule(addr); - else - panic("could not find kernel symbol \'soo_write\'"); - - if (kernelSymtab->findAddress("sendit", addr)) - senditEvent->schedule(addr); - else - panic("could not find kernel symbol \'sendit\'"); - - if (kernelSymtab->findAddress("sosend", addr)) - sosendEvent->schedule(addr); - else - panic("could not find kernel symbol \'sosend\'"); - - if (kernelSymtab->findAddress("tcp_sosend", addr)) - tcpSosendEvent->schedule(addr); - else - panic("could not find kernel symbol \'tcp_sosend\'"); - - if (kernelSymtab->findAddress("tcp_output", addr)) - tcpOutputEvent->schedule(addr); - else - panic("could not find kernel symbol \'tcp_output\'"); - - if (kernelSymtab->findAddress("ip_output", addr)) - ipOutputEvent->schedule(addr); - else - panic("could not find kernel symbol \'ip_output\'"); - - if (kernelSymtab->findAddress("ether_output", addr)) - etherOutputEvent->schedule(addr); - else - panic("could not find kernel symbol \'ether_output\'"); - - if (kernelSymtab->findAddress("es_start", addr)) - esStartEvent->schedule(addr); - else - panic("could not find kernel symbol \'es_start\'"); - - if (kernelSymtab->findAddress("es_transmit", addr)) - esTransmitEvent->schedule(addr); - else - panic("could not find kernel symbol \'es_transmit\'"); - - if (kernelSymtab->findAddress("es_txeof", addr)) - esTxeofEvent->schedule(addr); - else - panic("could not find kernel symbol \'es_txeof\'"); - - if (kernelSymtab->findAddress("idle_thread", addr)) - idleThreadEvent->schedule(addr); - else - panic("could not find kernel symbol \'idle_thread\'"); - - } - //INSTRUMENTATION CODEGEN END - if (bin == true) { fnCalls .name(name() + ":fnCalls") .desc("all fn calls being tracked") ; - - populateMap("es_intr", ""); - populateMap("es_rxeof", "es_intr"); - populateMap("es_newbuf", "es_rxeof"); - populateMap("es_dma_load", "es_newbuf"); - populateMap("dma_map_load", "es_dma_load"); - populateMap("ether_input", "es_rxeof"); - populateMap("netisr_input", "ether_input"); - populateMap("schednetisr_isr", "netisr_input"); - - populateMap("ipintr", ""); - populateMap("ip_dooptions", "ipintr"); - populateMap("ip_reass", "ipintr"); - populateMap("tcp_input", "ipintr"); - populateMap("sbappend", "tcp_input"); - - populateMap("read", ""); - populateMap("orecv", ""); - populateMap("soo_read", "read"); - populateMap("recvit", "orecv"); - populateMap("soreceive", "recvit"); - populateMap("soreceive", "soo_read"); - - populateMap("write", ""); - populateMap("osend", ""); - populateMap("soo_write", "write"); - populateMap("sendit", "osend"); - populateMap("sosend", "sendit"); - populateMap("sosend", "soo_write"); - populateMap("tcp_sosend", "sosend"); - populateMap("tcp_output", "tcp_sosend"); - populateMap("ip_output", "tcp_output"); - populateMap("ether_output", "ip_output"); - populateMap("es_start", "ether_output"); - populateMap("es_transmit", "es_start"); - - populateMap("es_txeof", "es_intr"); - - populateMap("idle_thread", ""); } -#endif //FS_MEASURE + // } Tru64System::~Tru64System() @@ -527,43 +214,13 @@ Tru64System::~Tru64System() delete debugPrintfrEvent; delete dumpMbufEvent; -#ifdef FS_MEASURE - //INSTRUMENTATION CODEGEN BEGIN FOUR if (bin == true) { - delete esIntrEvent; - delete esRxeofEvent; - delete esNewbufEvent; - delete esDmaLoadEvent; - delete dmaMapLoadEvent; - delete etherInputEvent; - delete netisrInputEvent; - delete schednetisrIsrEvent; - delete ipintrEvent; - delete ipDooptionsEvent; - delete ipReassEvent; - delete tcpInputEvent; - delete sbappendEvent; - delete readEvent; - delete sooReadEvent; - delete orecvEvent; - delete recvitEvent; - delete soreceiveEvent; - delete osendEvent; - delete writeEvent; - delete sooWriteEvent; - delete senditEvent; - delete sosendEvent; - delete tcpSosendEvent; - delete tcpOutputEvent; - delete ipOutputEvent; - delete etherOutputEvent; - delete esStartEvent; - delete esTransmitEvent; - delete esTxeofEvent; - delete idleThreadEvent; + int end = fnEvents.size(); + for (int i = 0; i < end; ++i) { + delete fnEvents[i]; + } + fnEvents.clear(); } - //INSTRUMENTATION CODEGEN END -#endif //FS_MEASURE } int @@ -629,19 +286,16 @@ Tru64System::findCaller(std::string callee, std::string caller) const void Tru64System::dumpState(ExecContext *xc) const { -#ifndef SW_DEBUG - return; -#endif if (xc->swCtx) { stack copy(xc->swCtx->callStack); if (copy.empty()) return; - cprintf("xc->swCtx:\n"); + DPRINTF(TCPIP, "xc->swCtx:\n"); fnCall *top; - cprintf("|| call: %d\n",xc->swCtx->calls); + DPRINTF(TCPIP, "|| call : %d\n",xc->swCtx->calls); for (top = copy.top(); !copy.empty(); copy.pop() ) { top = copy.top(); - cprintf("|| %13s : %s \n", top->name, top->myBin->name()); + DPRINTF(TCPIP, "|| %13s : %s \n", top->name, top->myBin->name()); } } } @@ -657,6 +311,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tru64System) Param console_code; Param pal_code; Param boot_osflags; + VectorParam binned_fns; END_DECLARE_SIM_OBJECT_PARAMS(Tru64System) @@ -670,8 +325,8 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(Tru64System) INIT_PARAM(console_code, "file that contains the console code"), INIT_PARAM(pal_code, "file that contains palcode"), INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot", - "a") - + "a"), + INIT_PARAM(binned_fns, "functions to be broken down and binned") END_INIT_SIM_OBJECT_PARAMS(Tru64System) @@ -679,7 +334,8 @@ CREATE_SIM_OBJECT(Tru64System) { Tru64System *sys = new Tru64System(getInstanceName(), init_param, mem_ctl, physmem, kernel_code, console_code, - pal_code, boot_osflags, bin); + pal_code, boot_osflags, bin, + binned_fns); return sys; } diff --git a/kern/tru64/tru64_system.hh b/kern/tru64/tru64_system.hh index bedf1f3838..34569664d8 100644 --- a/kern/tru64/tru64_system.hh +++ b/kern/tru64/tru64_system.hh @@ -57,42 +57,6 @@ class Tru64System : public System SymbolTable *kernelSymtab; SymbolTable *consoleSymtab; -#ifdef FS_MEASURE - //INSTRUMENTATION CODEGEN BEGIN ONE - Statistics::MainBin *esIntrBin; - Statistics::MainBin *esRxeofBin; - Statistics::MainBin *esNewbufBin; - Statistics::MainBin *esDmaLoadBin; - Statistics::MainBin *dmaMapLoadBin; - Statistics::MainBin *etherInputBin; - Statistics::MainBin *netisrInputBin; - Statistics::MainBin *schednetisrIsrBin; - Statistics::MainBin *ipintrBin; - Statistics::MainBin *ipDooptionsBin; - Statistics::MainBin *ipReassBin; - Statistics::MainBin *tcpInputBin; - Statistics::MainBin *sbappendBin; - Statistics::MainBin *readBin; - Statistics::MainBin *sooReadBin; - Statistics::MainBin *orecvBin; - Statistics::MainBin *recvitBin; - Statistics::MainBin *soreceiveBin; - Statistics::MainBin *osendBin; - Statistics::MainBin *writeBin; - Statistics::MainBin *sooWriteBin; - Statistics::MainBin *senditBin; - Statistics::MainBin *sosendBin; - Statistics::MainBin *tcpSosendBin; - Statistics::MainBin *tcpOutputBin; - Statistics::MainBin *ipOutputBin; - Statistics::MainBin *etherOutputBin; - Statistics::MainBin *esStartBin; - Statistics::MainBin *esTransmitBin; - Statistics::MainBin *esTxeofBin; - Statistics::MainBin *idleThreadBin; - //INSTRUMENTATION CODEGEN END -#endif //FS_MEASURE - BreakPCEvent *kernelPanicEvent; BreakPCEvent *consolePanicEvent; BadAddrEvent *badaddrEvent; @@ -102,41 +66,8 @@ class Tru64System : public System DebugPrintfEvent *debugPrintfEvent; DebugPrintfEvent *debugPrintfrEvent; DumpMbufEvent *dumpMbufEvent; -#ifdef FS_MEASURE - //INSTRUMENTATION CODEGEN BEGIN TWO - FnEvent *esIntrEvent; - FnEvent *esRxeofEvent; - FnEvent *esNewbufEvent; - FnEvent *esDmaLoadEvent; - FnEvent *dmaMapLoadEvent; - FnEvent *etherInputEvent; - FnEvent *netisrInputEvent; - FnEvent *schednetisrIsrEvent; - FnEvent *ipintrEvent; - FnEvent *ipDooptionsEvent; - FnEvent *ipReassEvent; - FnEvent *tcpInputEvent; - FnEvent *sbappendEvent; - FnEvent *readEvent; - FnEvent *sooReadEvent; - FnEvent *orecvEvent; - FnEvent *recvitEvent; - FnEvent *soreceiveEvent; - FnEvent *osendEvent; - FnEvent *writeEvent; - FnEvent *sooWriteEvent; - FnEvent *senditEvent; - FnEvent *sosendEvent; - FnEvent *tcpSosendEvent; - FnEvent *tcpOutputEvent; - FnEvent *ipOutputEvent; - FnEvent *etherOutputEvent; - FnEvent *esStartEvent; - FnEvent *esTransmitEvent; - FnEvent *esTxeofEvent; - FnEvent *idleThreadEvent; - //INSTRUMENTATION CODEGEN END -#endif //FS_MEASURE + + std::vector fnEvents; private: @@ -144,6 +75,7 @@ class Tru64System : public System Addr kernelEnd; Addr kernelEntry; bool bin; + std::vector binned_fns; public: std::vector remoteGDB; @@ -158,7 +90,8 @@ class Tru64System : public System const std::string &console_path, const std::string &palcode, const std::string &boot_osflags, - const bool _bin); + const bool _bin, + const std::vector &binned_fns); ~Tru64System(); int registerExecContext(ExecContext *xc); @@ -173,7 +106,7 @@ class Tru64System : public System static void DumpMbuf(AlphaArguments args); - // Lisa's fs measure stuff + // Lisa's binning stuff private: std::multimap callerMap; void populateMap(std::string caller, std::string callee); @@ -181,6 +114,7 @@ class Tru64System : public System public: bool findCaller(std::string callee, std::string caller) const; void dumpState(ExecContext *xc) const; + // }; #endif // __TRU64_SYSTEM_HH__ diff --git a/sim/system.cc b/sim/system.cc index db93250eea..36275f4000 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -50,13 +50,11 @@ System::System(const std::string _name, { // add self to global system list systemList.push_back(this); -#ifdef FS_MEASURE if (bin == true) { - nonPath = new Statistics::MainBin("non TCPIP path stats"); - nonPath->activate(); + Kernel = new Statistics::MainBin("non TCPIP Kernel stats"); + Kernel->activate(); } else - nonPath = NULL; -#endif + Kernel = NULL; } @@ -104,7 +102,6 @@ printSystems() System::printSystems(); } -#ifdef FS_MEASURE Statistics::MainBin * System::getBin(const std::string &name) { @@ -127,7 +124,6 @@ System::findContext(Addr pcb) } else return NULL; } -#endif //FS_MEASURE DEFINE_SIM_OBJECT_CLASS_NAME("System", System) diff --git a/sim/system.hh b/sim/system.hh index 2e0cb3dbfc..aba5f25900 100644 --- a/sim/system.hh +++ b/sim/system.hh @@ -54,7 +54,7 @@ class System : public SimObject public: Statistics::Scalar fnCalls; - Statistics::MainBin *nonPath; + Statistics::MainBin *Kernel; Statistics::MainBin * getBin(const std::string &name); virtual bool findCaller(std::string, std::string) const = 0; From 4fa703f2ec733ccb8b5ffaa741db0b8510fbe188 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 05:09:05 -0500 Subject: [PATCH 70/85] serialization for binning. it is WAAAAAAAY past my bedtime. cpu/exec_context.cc: sim/system.cc: sim/system.hh: serialization for binning --HG-- extra : convert_revision : f8417794a3a5ec7f2addc9c2da0f48e851899112 --- cpu/exec_context.cc | 48 +++++++++++++++++++++++++++++++++++ sim/system.cc | 61 ++++++++++++++++++++++++++++++++++++++++++++- sim/system.hh | 4 +++ 3 files changed, 112 insertions(+), 1 deletion(-) diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index b0ebb9622d..20ab64bc4f 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -104,6 +104,29 @@ ExecContext::serialize(ostream &os) regs.serialize(os); // thread_num and cpu_id are deterministic from the config SERIALIZE_SCALAR(func_exe_inst); + + bool ctx = false; + if (swCtx) { + ctx = true; + SERIALIZE_SCALAR(ctx); + SERIALIZE_SCALAR(swCtx->calls); + std::stack *stack = &(swCtx->callStack); + fnCall *top; + int size = stack->size(); + SERIALIZE_SCALAR(size); + + for (int j=0; jtop(); + paramOut(os, csprintf("stackpos[%d]",j), top->name); + } + } else { + SERIALIZE_SCALAR(ctx); + } + if (system->bin) { + Statistics::MainBin *cur = Statistics::MainBin::curBin(); + string bin_name = cur->name(); + SERIALIZE_SCALAR(bin_name); + } } @@ -114,6 +137,31 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) regs.unserialize(cp, section); // thread_num and cpu_id are deterministic from the config UNSERIALIZE_SCALAR(func_exe_inst); + + bool ctx; + UNSERIALIZE_SCALAR(ctx); + if (ctx) { + swCtx = new SWContext; + UNSERIALIZE_SCALAR(swCtx->calls); + int size; + UNSERIALIZE_SCALAR(size); + fnCall *call = new fnCall[size]; + for (int i=0; igetBin(call[i].name); + } + + for (int i=size-1; i>=0; --i) { + swCtx->callStack.push(&(call[i])); + } + + } + + if (system->bin) { + string bin_name; + UNSERIALIZE_SCALAR(bin_name); + system->getBin(bin_name)->activate(); + } } diff --git a/sim/system.cc b/sim/system.cc index 36275f4000..fa8e8c463e 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -108,7 +108,7 @@ System::getBin(const std::string &name) std::map::const_iterator i; i = fnBins.find(name); if (i == fnBins.end()) - panic("trying to getBin that is not on system map!"); + panic("trying to getBin %s that is not on system map!", name); return (*i).second; } @@ -125,5 +125,64 @@ System::findContext(Addr pcb) return NULL; } +void +System::serialize(std::ostream &os) +{ + if (bin == true) { + map::const_iterator iter, end; + iter = swCtxMap.begin(); + end = swCtxMap.end(); + + int numCtxs = swCtxMap.size(); + SERIALIZE_SCALAR(numCtxs); + SWContext *ctx; + for (int i = 0; iter != end; ++i) { + paramOut(os, csprintf("Addr[%d]",i), (*iter).first); + ctx = (*iter).second; + paramOut(os, csprintf("calls[%d]",i), ctx->calls); + + stack *stack = &(ctx->callStack); + fnCall *top; + int size = stack->size(); + paramOut(os, csprintf("stacksize[%d]",i), size); + for (int j=0; jtop(); + paramOut(os, csprintf("ctx[%d].stackpos[%d]",i,j), top->name); + } + } + } +} + +void +System::unserialize(Checkpoint *cp, const std::string §ion) +{ + if (bin == true) { + int numCtxs; + UNSERIALIZE_SCALAR(numCtxs); + + SWContext *ctxs = new SWContext[numCtxs]; + Addr addr; + int size; + for(int i = 0; i < numCtxs; ++i) { + paramIn(cp, section, csprintf("Addr[%d]",i), addr); + paramIn(cp, section, csprintf("calls[%d]",i), ctxs[i].calls); + + paramIn(cp, section, csprintf("stacksize[%d]",i), size); + fnCall *call = new fnCall[size]; + for (int j = 0; j < size; ++j) { + paramIn(cp, section, csprintf("ctx[%d].stackpos[%d]",i,j), + call[j].name); + call[j].myBin = getBin(call[j].name); + } + + for (int j=size-1; j>=0; --j) { + ctxs[i].callStack.push(&(call[j])); + } + + addContext(addr, &(ctxs[i])); + } + } +} + DEFINE_SIM_OBJECT_CLASS_NAME("System", System) diff --git a/sim/system.hh b/sim/system.hh index aba5f25900..3d6d3fc39b 100644 --- a/sim/system.hh +++ b/sim/system.hh @@ -70,6 +70,10 @@ class System : public SimObject virtual void dumpState(ExecContext *xc) const = 0; + virtual void serialize(std::ostream &os); + virtual void unserialize(Checkpoint *cp, const std::string §ion); + // + public: const uint64_t init_param; MemoryController *memCtrl; From 1a300ef60da887fd3e90add708af4344e19770cb Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 05:38:04 -0500 Subject: [PATCH 71/85] small bugfix, forgot to increment iter sim/system.cc: oops, forgot to increment iter. --HG-- extra : convert_revision : 95fcd337d00157ccf072f0eb301b76f280480839 --- sim/system.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sim/system.cc b/sim/system.cc index fa8e8c463e..40c841ed58 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -53,6 +53,7 @@ System::System(const std::string _name, if (bin == true) { Kernel = new Statistics::MainBin("non TCPIP Kernel stats"); Kernel->activate(); + User = new Statistics::MainBin("User stats"); } else Kernel = NULL; } @@ -136,7 +137,7 @@ System::serialize(std::ostream &os) int numCtxs = swCtxMap.size(); SERIALIZE_SCALAR(numCtxs); SWContext *ctx; - for (int i = 0; iter != end; ++i) { + for (int i = 0; iter != end; ++i, ++iter) { paramOut(os, csprintf("Addr[%d]",i), (*iter).first); ctx = (*iter).second; paramOut(os, csprintf("calls[%d]",i), ctx->calls); From 4992680ea28928b165e9fe16d19f4630c66af173 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 5 Mar 2004 05:44:11 -0500 Subject: [PATCH 72/85] add ticks per picosecond --HG-- extra : convert_revision : 1585e7f89340b941e699db6b81080af58500a7c2 --- sim/universe.cc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sim/universe.cc b/sim/universe.cc index feede514e9..d6c849ac7d 100644 --- a/sim/universe.cc +++ b/sim/universe.cc @@ -47,6 +47,7 @@ Tick ticksPerSecond; double __ticksPerMS; double __ticksPerUS; double __ticksPerNS; +double __ticksPerPS; string outputDirectory; ostream *outputStream; @@ -79,6 +80,7 @@ UniverseParamContext::checkParams() __ticksPerMS = freq / 1.0e3; __ticksPerUS = freq / 1.0e6; __ticksPerNS = freq / 1.0e9; + __ticksPerPS = freq / 1.0e12; if (universe_output_dir.isValid()) { outputDirectory = universe_output_dir; From 34d36c45bf90ad64d63a64222c9d046c934d80c5 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 5 Mar 2004 05:44:46 -0500 Subject: [PATCH 73/85] use %#x so we know that it is hex --HG-- extra : convert_revision : 7da77cd9a16ba70eeb0382c3c79b1475554a2d4c From ec6265b044b131fbd9b2b8b97788646c29293d1e Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 5 Mar 2004 05:45:45 -0500 Subject: [PATCH 74/85] constructor option to make the wrapped event autodelete --HG-- extra : convert_revision : 8663c874c533685adf21eea968b08b40b7d7b665 --- sim/eventq.hh | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/sim/eventq.hh b/sim/eventq.hh index 60a61fa298..ed37fd4f4a 100644 --- a/sim/eventq.hh +++ b/sim/eventq.hh @@ -243,10 +243,13 @@ class EventWrapper : public Event T *object; public: - EventWrapper(T *obj, EventQueue *q = &mainEventQueue, + EventWrapper(T *obj, bool del = false, EventQueue *q = &mainEventQueue, Priority p = Default_Pri) : Event(q, p), object(obj) - {} + { + if (del) + setFlags(AutoDelete); + } void process() { (object->*F)(); } }; @@ -324,6 +327,8 @@ inline void Event::schedule(Tick t) { assert(!scheduled()); + assert(t >= curTick); + setFlags(Scheduled); #if TRACING_ON when_scheduled = curTick; From c74cb77fa40b09089a383fb961c5fb0ec030f3c7 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 5 Mar 2004 05:47:05 -0500 Subject: [PATCH 75/85] Add support for a propagation delay on the link. The electrical delay is more or less folded into the packet time, but an additional delay is possible representing crossing a long haul link, or some switches, etc. --HG-- extra : convert_revision : 8fd689c2a7e3051e77f47a4cd5f51c6999d92c8f --- dev/etherlink.cc | 131 +++++++++++++++++++++++++++++++++++++++-------- dev/etherlink.hh | 31 +++++------ 2 files changed, 121 insertions(+), 41 deletions(-) diff --git a/dev/etherlink.cc b/dev/etherlink.cc index 6396d758dd..25991f1a75 100644 --- a/dev/etherlink.cc +++ b/dev/etherlink.cc @@ -46,14 +46,15 @@ using namespace std; -EtherLink::EtherLink(const std::string &name, EtherInt *i1, EtherInt *i2, - Tick speed, EtherDump *dump) +EtherLink::EtherLink(const string &name, EtherInt *i1, EtherInt *i2, + Tick speed, Tick dly, EtherDump *dump) : SimObject(name) { double rate = ((double)ticksPerSecond * 8.0) / (double)speed; + Tick delay = US2Ticks(dly); - link1 = new Link(name + ".link1", rate, dump); - link2 = new Link(name + ".link2", rate, dump); + link1 = new Link(name + ".link1", rate, delay, dump); + link2 = new Link(name + ".link2", rate, delay, dump); int1 = new Interface(name + ".int1", link1, link2); int2 = new Interface(name + ".int2", link2, link1); @@ -73,16 +74,17 @@ EtherLink::~EtherLink() delete int2; } -EtherLink::Interface::Interface(const std::string &name, Link *tx, Link *rx) +EtherLink::Interface::Interface(const string &name, Link *tx, Link *rx) : EtherInt(name), txlink(tx) { tx->setTxInt(this); rx->setRxInt(this); } -EtherLink::Link::Link(const std::string &name, double rate, EtherDump *d) - : objName(name), txint(NULL), rxint(NULL), ticks_per_byte(rate), - dump(d), event(&mainEventQueue, this) +EtherLink::Link::Link(const string &name, double rate, Tick delay, + EtherDump *d) + : objName(name), txint(NULL), rxint(NULL), ticksPerByte(rate), + linkDelay(delay), dump(d), doneEvent(this) {} void @@ -101,16 +103,47 @@ EtherLink::unserialize(Checkpoint *cp, const string §ion) link2->unserialize(cp, section + ".link2"); } +void +EtherLink::Link::txComplete(PacketPtr &packet) +{ + DPRINTF(Ethernet, "packet received: len=%d\n", packet->length); + DDUMP(EthernetData, packet->data, packet->length); + rxint->sendPacket(packet); +} + +class LinkDelayEvent : public Event +{ + protected: + EtherLink::Link *link; + PacketPtr packet; + + // non-scheduling version for createForUnserialize() + LinkDelayEvent(EtherLink::Link *link); + + public: + LinkDelayEvent(EtherLink::Link *link, PacketPtr &pkt, Tick when); + + void process(); + + virtual void serialize(ostream &os); + virtual void unserialize(Checkpoint *cp, const string §ion); + static Serializable *createForUnserialize(Checkpoint *cp, + const string §ion); +}; + + void EtherLink::Link::txDone() { if (dump) dump->dump(packet); - DPRINTF(Ethernet, "EtherLink packet received: len=%d\n", packet->length); - DDUMP(EthernetData, packet->data, packet->length); - - rxint->sendPacket(packet); + if (linkDelay > 0) { + DPRINTF(Ethernet, "packet delayed: delay=%d\n", linkDelay); + new LinkDelayEvent(this, packet, curTick + linkDelay); + } else { + txComplete(packet); + } packet = 0; assert(!busy()); @@ -122,18 +155,18 @@ bool EtherLink::Link::transmit(PacketPtr &pkt) { if (busy()) { - DPRINTF(Ethernet, "EtherLink packet not sent, link busy\n"); + DPRINTF(Ethernet, "packet not sent, link busy\n"); return false; } - DPRINTF(Ethernet, "EtherLink packet sent: len=%d\n", pkt->length); + DPRINTF(Ethernet, "packet sent: len=%d\n", pkt->length); DDUMP(EthernetData, pkt->data, pkt->length); packet = pkt; - int delay = (int)ceil(((double)pkt->length * ticks_per_byte) + 1.0); - DPRINTF(Ethernet, "EtherLink scheduling packet: delay=%d, (rate=%f)\n", - delay, ticks_per_byte); - event.schedule(curTick + delay); + Tick delay = (Tick)ceil(((double)pkt->length * ticksPerByte) + 1.0); + DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n", + delay, ticksPerByte); + doneEvent.schedule(curTick + delay); return true; } @@ -144,10 +177,10 @@ EtherLink::Link::serialize(ostream &os) bool packet_exists = packet; SERIALIZE_SCALAR(packet_exists); - bool event_scheduled = event.scheduled(); + bool event_scheduled = doneEvent.scheduled(); SERIALIZE_SCALAR(event_scheduled); if (event_scheduled) { - Tick event_time = event.when(); + Tick event_time = doneEvent.when(); SERIALIZE_SCALAR(event_time); } @@ -172,15 +205,68 @@ EtherLink::Link::unserialize(Checkpoint *cp, const string §ion) if (event_scheduled) { Tick event_time; UNSERIALIZE_SCALAR(event_time); - event.schedule(event_time); + doneEvent.schedule(event_time); } } +LinkDelayEvent::LinkDelayEvent(EtherLink::Link *l) + : Event(&mainEventQueue), link(l) +{ + setFlags(AutoSerialize); + setFlags(AutoDelete); +} + +LinkDelayEvent::LinkDelayEvent(EtherLink::Link *l, PacketPtr &p, Tick when) + : Event(&mainEventQueue), link(l), packet(p) +{ + setFlags(AutoSerialize); + setFlags(AutoDelete); + schedule(when); +} + +void +LinkDelayEvent::process() +{ + link->txComplete(packet); +} + +void +LinkDelayEvent::serialize(ostream &os) +{ + paramOut(os, "type", string("LinkDelayEvent")); + Event::serialize(os); + SERIALIZE_OBJPTR(link); + + nameOut(os, csprintf("%s.packet", name())); + packet->serialize(os); +} + + +void +LinkDelayEvent::unserialize(Checkpoint *cp, const string §ion) +{ + Event::unserialize(cp, section); + packet = new EtherPacket; + packet->unserialize(cp, csprintf("%s.packet", section)); +} + + +Serializable * +LinkDelayEvent::createForUnserialize(Checkpoint *cp, const string §ion) +{ + EtherLink::Link *link; + UNSERIALIZE_OBJPTR(link); + return new LinkDelayEvent(link); +} + +REGISTER_SERIALIZEABLE("LinkDelayEvent", LinkDelayEvent) + BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherLink) SimObjectParam interface1; SimObjectParam interface2; Param link_speed; + Param link_delay; SimObjectParam packet_dump; END_DECLARE_SIM_OBJECT_PARAMS(EtherLink) @@ -190,6 +276,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(EtherLink) INIT_PARAM(interface1, "interface 1"), INIT_PARAM(interface2, "interface 2"), INIT_PARAM_DFLT(link_speed, "link speed in bits per second", 100000000), + INIT_PARAM_DFLT(link_delay, "transmit delay of packets in us", 0), INIT_PARAM_DFLT(packet_dump, "object to dump network packets to", NULL) END_INIT_SIM_OBJECT_PARAMS(EtherLink) @@ -197,7 +284,7 @@ END_INIT_SIM_OBJECT_PARAMS(EtherLink) CREATE_SIM_OBJECT(EtherLink) { return new EtherLink(getInstanceName(), interface1, interface2, link_speed, - packet_dump); + link_delay, packet_dump); } REGISTER_SIM_OBJECT("EtherLink", EtherLink) diff --git a/dev/etherlink.hh b/dev/etherlink.hh index 8505570a61..3b1dd21bc2 100644 --- a/dev/etherlink.hh +++ b/dev/etherlink.hh @@ -49,6 +49,7 @@ class EtherLink : public SimObject protected: class Interface; + friend class LinkDelayEvent; /* * Model for a single uni-directional link */ @@ -59,34 +60,26 @@ class EtherLink : public SimObject Interface *txint; Interface *rxint; - double ticks_per_byte; + double ticksPerByte; + Tick linkDelay; EtherDump *dump; protected: /* * Transfer is complete */ - class DoneEvent : public Event - { - protected: - Link *link; - - public: - DoneEvent(EventQueue *q, Link *l) - : Event(q), link(l) {} - virtual void process() { link->txDone(); } - virtual const char *description() - { return "ethernet link completion"; } - }; - - friend class DoneEvent; - DoneEvent event; PacketPtr packet; - void txDone(); + typedef EventWrapper DoneEvent; + friend class DoneEvent; + DoneEvent doneEvent; + + friend class LinkDelayEvent; + void txComplete(PacketPtr &packet); public: - Link(const std::string &name, double rate, EtherDump *dump); + Link(const std::string &name, double rate, Tick delay, + EtherDump *dump); ~Link() {} virtual const std::string name() const { return objName; } @@ -123,7 +116,7 @@ class EtherLink : public SimObject public: EtherLink(const std::string &name, EtherInt *i1, EtherInt *i2, - Tick speed, EtherDump *dump); + Tick speed, Tick delay, EtherDump *dump); virtual ~EtherLink(); virtual void serialize(std::ostream &os); From adc176d13fbaa0b4809d1aecd68a7fdd7a3bb586 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 5 Mar 2004 05:48:56 -0500 Subject: [PATCH 76/85] add a mechanism for delayed interrupts (aka. interrupt coalescing) re-do fixed dma latency --HG-- extra : convert_revision : b91e6b69682f66e424782e89500d3ad47b797e25 From 66325a2a309ead8d4affd68aa5108b0925b5f987 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 5 Mar 2004 05:49:49 -0500 Subject: [PATCH 77/85] Make payload splitting accessible with a #define --HG-- extra : convert_revision : 90b86b270a84cffaf3d13a2b83c04f33bb442e44 From a57bc93e82ac074204a32011a2c756ad1daedad5 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 5 Mar 2004 05:50:19 -0500 Subject: [PATCH 78/85] Don't dump an ethertrace by default Update the system dir for the addition of parallel and dirty netperf --HG-- extra : convert_revision : e46efb32e0d6c21047507d444d41e7d55fbfb770 From 9c4832714523b01b9fc5b0430b1d34251684c045 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 05:54:46 -0500 Subject: [PATCH 79/85] forgot to check this in --HG-- extra : convert_revision : 3090da3ab1077736bae52519143b44b08dd5ddb9 --- sim/system.hh | 1 + 1 file changed, 1 insertion(+) diff --git a/sim/system.hh b/sim/system.hh index 3d6d3fc39b..e5bf9cdac1 100644 --- a/sim/system.hh +++ b/sim/system.hh @@ -55,6 +55,7 @@ class System : public SimObject public: Statistics::Scalar fnCalls; Statistics::MainBin *Kernel; + Statistics::MainBin *User; Statistics::MainBin * getBin(const std::string &name); virtual bool findCaller(std::string, std::string) const = 0; From 12662c0b6d765ccfd9ac17ff810560cea62b2e7a Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 06:14:33 -0500 Subject: [PATCH 80/85] nother fix cpu/exec_context.cc: nother little bug...forgot to pop off stack as i read off it sim/system.cc: forgot to pop off stack as i read off it --HG-- extra : convert_revision : d1f691c0a9f0fa22281c717ee465d8a5f1e45c13 --- cpu/exec_context.cc | 2 ++ sim/system.cc | 5 ++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 20ab64bc4f..06bd741f2c 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -118,6 +118,8 @@ ExecContext::serialize(ostream &os) for (int j=0; jtop(); paramOut(os, csprintf("stackpos[%d]",j), top->name); + delete top; + stack->pop(); } } else { SERIALIZE_SCALAR(ctx); diff --git a/sim/system.cc b/sim/system.cc index 40c841ed58..9517394626 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -148,7 +148,10 @@ System::serialize(std::ostream &os) paramOut(os, csprintf("stacksize[%d]",i), size); for (int j=0; jtop(); - paramOut(os, csprintf("ctx[%d].stackpos[%d]",i,j), top->name); + paramOut(os, csprintf("ctx[%d].stackpos[%d]",i,j), + top->name); + delete top; + stack->pop(); } } } From d9689c58d3fe1ffc674815093c1f0af118d28f58 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 06:15:30 -0500 Subject: [PATCH 81/85] bin user and kernel stats --HG-- extra : convert_revision : 66e6181ad3e8b6567da9f2b82d87e7af49f28eaf From 34576de15a3c8f8a50437e5d95b1402722cf9e2b Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 08:16:33 -0500 Subject: [PATCH 82/85] changes that affect post checkpoint runs. cpu/exec_context.cc: you can't delete an element of an array that you newed. oops. kern/tru64/tru64_events.cc: changes to reflect .ini changes, and also b/c es_intr and ipintr can happen at ANY point, even within a current calling path being tracked. sim/system.cc: can't delete an element of a newed array. must new them separately. --HG-- extra : convert_revision : 21573327b7b7f20bf9a3fcfb5854526433e17e17 --- cpu/exec_context.cc | 12 ++++++++---- kern/tru64/tru64_events.cc | 4 +++- sim/system.cc | 19 ++++++++++++------- 3 files changed, 23 insertions(+), 12 deletions(-) diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 06bd741f2c..7766412025 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -147,14 +147,18 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(swCtx->calls); int size; UNSERIALIZE_SCALAR(size); - fnCall *call = new fnCall[size]; + + vector calls; + fnCall *call; for (int i=0; igetBin(call[i].name); + call = new fnCall; + paramIn(cp, section, csprintf("stackpos[%d]",i), call->name); + call->myBin = system->getBin(call->name); + calls.push_back(call); } for (int i=size-1; i>=0; --i) { - swCtx->callStack.push(&(call[i])); + swCtx->callStack.push(calls[i]); } } diff --git a/kern/tru64/tru64_events.cc b/kern/tru64/tru64_events.cc index e018cb242b..a57c01841d 100644 --- a/kern/tru64/tru64_events.cc +++ b/kern/tru64/tru64_events.cc @@ -130,7 +130,9 @@ FnEvent::process(ExecContext *xc) if (last->name == "idle_thread") ctx->calls++; - if (!xc->system->findCaller(myname(), last->name)) { + if (!xc->system->findCaller(myname(), "" ) && + !xc->system->findCaller(myname(), last->name)) { + DPRINTF(TCPIP, "but can't find parent %s\n", last->name); return; } diff --git a/sim/system.cc b/sim/system.cc index 9517394626..43f43baecb 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -164,26 +164,31 @@ System::unserialize(Checkpoint *cp, const std::string §ion) int numCtxs; UNSERIALIZE_SCALAR(numCtxs); - SWContext *ctxs = new SWContext[numCtxs]; + SWContext *ctx; Addr addr; int size; for(int i = 0; i < numCtxs; ++i) { + ctx = new SWContext; paramIn(cp, section, csprintf("Addr[%d]",i), addr); - paramIn(cp, section, csprintf("calls[%d]",i), ctxs[i].calls); + paramIn(cp, section, csprintf("calls[%d]",i), ctx->calls); paramIn(cp, section, csprintf("stacksize[%d]",i), size); - fnCall *call = new fnCall[size]; + + vector calls; + fnCall *call; for (int j = 0; j < size; ++j) { + call = new fnCall; paramIn(cp, section, csprintf("ctx[%d].stackpos[%d]",i,j), - call[j].name); - call[j].myBin = getBin(call[j].name); + call->name); + call->myBin = getBin(call->name); + calls.push_back(call); } for (int j=size-1; j>=0; --j) { - ctxs[i].callStack.push(&(call[j])); + ctx->callStack.push(calls[j]); } - addContext(addr, &(ctxs[i])); + addContext(addr, ctx); } } } From 6eebb270be15761239565da526f84c5ec7aa45b8 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 15:15:23 -0500 Subject: [PATCH 83/85] fix ALPHA cpu/exec_context.cc: put this code between #ifdef FULL_SYSTEM --HG-- extra : convert_revision : b934c7085d2a4337149ab8180a7d50851fbbf170 --- cpu/exec_context.cc | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 7766412025..eedd8b8a8d 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -105,6 +105,7 @@ ExecContext::serialize(ostream &os) // thread_num and cpu_id are deterministic from the config SERIALIZE_SCALAR(func_exe_inst); +#ifdef FULL_SYSTEM bool ctx = false; if (swCtx) { ctx = true; @@ -129,6 +130,7 @@ ExecContext::serialize(ostream &os) string bin_name = cur->name(); SERIALIZE_SCALAR(bin_name); } +#endif //FULL_SYSTEM } @@ -140,6 +142,7 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) // thread_num and cpu_id are deterministic from the config UNSERIALIZE_SCALAR(func_exe_inst); +#ifdef FULL_SYSTEM bool ctx; UNSERIALIZE_SCALAR(ctx); if (ctx) { @@ -168,6 +171,7 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(bin_name); system->getBin(bin_name)->activate(); } +#endif //FULL_SYSTEM } From 532374bf2b3f096974c857d1bae65b6fbdad1e12 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 19:18:58 -0500 Subject: [PATCH 84/85] change the naming of MainBins. didn't check this in before because i had random debug statements i didn't want to push along with it. kern/tru64/tru64_system.cc: change the naming of Bins, add some DPRINTFs --HG-- extra : convert_revision : 65eeb61caa3132adc45972feff891e4a969c06c5 --- kern/tru64/tru64_system.cc | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/kern/tru64/tru64_system.cc b/kern/tru64/tru64_system.cc index 8df8cc86db..b03d7bf263 100644 --- a/kern/tru64/tru64_system.cc +++ b/kern/tru64/tru64_system.cc @@ -48,8 +48,8 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param, const string &kernel_path, const string &console_path, const string &palcode, const string &boot_osflags, const bool _bin, const vector &binned_fns) - : System(_name, _init_param, _memCtrl, _physmem, _bin), bin(_bin), - binned_fns(binned_fns) + : System(_name, _init_param, _memCtrl, _physmem, _bin), + bin(_bin), binned_fns(binned_fns) { kernelSymtab = new SymbolTable; consoleSymtab = new SymbolTable; @@ -170,8 +170,7 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param, fnEvents.resize(end>>1); for (int i = 0; i < end; i +=2) { - cout << "creating Bin for " << binned_fns[i] << endl; - Bin = new Statistics::MainBin(name() + " " + binned_fns[i]); + Bin = new Statistics::MainBin(binned_fns[i]); fnBins.insert(make_pair(binned_fns[i], Bin)); fnEvents[(i>>1)] = new FnEvent(&pcEventQueue, binned_fns[i], this); @@ -290,7 +289,7 @@ Tru64System::dumpState(ExecContext *xc) const stack copy(xc->swCtx->callStack); if (copy.empty()) return; - DPRINTF(TCPIP, "xc->swCtx:\n"); + DPRINTF(TCPIP, "xc->swCtx, size: %d:\n", copy.size()); fnCall *top; DPRINTF(TCPIP, "|| call : %d\n",xc->swCtx->calls); for (top = copy.top(); !copy.empty(); copy.pop() ) { From 2c60d7aa9e4b48f30ab8c48436ff2dfec8e390f2 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Sun, 7 Mar 2004 01:26:16 -0500 Subject: [PATCH 85/85] Performance improvement for unaligned copy --HG-- extra : convert_revision : 36a67874c119c4ef5dbd6692292dae1a5dcfded0