cpu,arch-arm: Initialise data members

The value that is not initialized has a bogus value that manifests when
using some debug-flags what makes the usage of tracediff a bit more
challenging.

In addition, while debugging with other techniques, it introduces the
problem of understanding if the value of a field is 'intended' or just
an effect of the lack of initialisation.

Change-Id: Ied88caa77479c6f1d5166d80d1a1a057503cb106
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13125
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>

src/cpu/base_dyn_inst_impl.hh

@@ -63,7 +63,15 @@ BaseDynInst<Impl>::BaseDynInst(const StaticInstPtr &_staticInst,
                                const StaticInstPtr &_macroop,
                                TheISA::PCState _pc, TheISA::PCState _predPC,
                                InstSeqNum seq_num, ImplCPU *cpu)
-  : staticInst(_staticInst), cpu(cpu), traceData(NULL), macroop(_macroop)
+  : staticInst(_staticInst), cpu(cpu),
+    thread(nullptr),
+    traceData(nullptr),
+    macroop(_macroop),
+    memData(nullptr),
+    savedReq(nullptr),
+    savedSreqLow(nullptr),
+    savedSreqHigh(nullptr),
+    reqToVerify(nullptr)
 {
     seqNum = seq_num;