From 9bbec8808b6b051b526845ed4e9a9b1a4fa67f3a Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 27 Jan 2004 12:45:12 -0500 Subject: [PATCH 1/4] Add trace flag for the sampling CPU --HG-- extra : convert_revision : 928588d46fa069e869416f4f5df8041849625e9f From f7a8db20fe538c41ae32d2a0b91b3d4f7d951097 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 27 Jan 2004 13:55:50 -0500 Subject: [PATCH 2/4] Always write out a value for pending so that an m5.fast simulator can generate a checkpoint that an m5.debug simulator can use --HG-- extra : convert_revision : eec2d94013119236a9c65c9b5fb6c2ccb0480f51 From 6e61efbbb5dfb1617869d647275b714cfd40f9cd Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Tue, 27 Jan 2004 16:40:04 -0500 Subject: [PATCH 3/4] Remove SS-like code from lru.hh/cc --HG-- extra : convert_revision : 66baf998671a24e6a630d2f35c2f529418cd4d5b From 801c46d25049bbf1fea4c3b0f115b095b58e6323 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 27 Jan 2004 17:56:23 -0500 Subject: [PATCH 4/4] a bunch of warning fixes arch/alpha/isa_desc: don't say warn: Warning: base/misc.cc: avoid printing two newlines in a row sim/main.cc: print out a message just before we enter the event queue --HG-- extra : convert_revision : 2a824d4b67661903fc739a0fb0759aa91d72382c --- arch/alpha/isa_desc | 6 +++--- base/misc.cc | 38 +++++++++++++++++++++++++++++++++----- sim/main.cc | 1 + 3 files changed, 37 insertions(+), 8 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index f0a4699f42..3533da09ff 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -538,7 +538,7 @@ declare {{ trappingMode((enum TrappingMode)FP_TRAPMODE) { if (trappingMode != Imprecise) { - warn("Warning: precise FP traps unimplemented\n"); + warn("precise FP traps unimplemented\n"); } } @@ -1609,7 +1609,7 @@ declare {{ Trace::InstRecord *traceData) { if (!warned) { - warn("Warning: instruction '%s' unimplemented\n", mnemonic); + warn("instruction '%s' unimplemented\n", mnemonic); warned = true; } @@ -1620,7 +1620,7 @@ declare {{ Trace::InstRecord *traceData) { if (!xc->spec_mode && !warned) { - warn("Warning: instruction '%s' unimplemented\n", mnemonic); + warn("instruction '%s' unimplemented\n", mnemonic); warned = true; } diff --git a/base/misc.cc b/base/misc.cc index 8190caddde..80968bd44d 100644 --- a/base/misc.cc +++ b/base/misc.cc @@ -42,7 +42,17 @@ void __panic(const string &format, cp::ArgList &args, const char *func, const char *file, int line) { - string fmt = "panic: " + format + " @ cycle %d\n[%s:%s, line %d]\n"; + string fmt = "panic: " + format; + switch (fmt[fmt.size() - 1]) { + case '\n': + case '\r': + break; + default: + fmt += "\n"; + } + + fmt += " @ cycle %d\n[%s:%s, line %d]\n"; + args.append(curTick); args.append(func); args.append(file); @@ -63,8 +73,18 @@ void __fatal(const string &format, cp::ArgList &args, const char *func, const char *file, int line) { - string fmt = "fatal: " + format + " @ cycle %d\n[%s:%s, line %d]\n" - "Memory Usage: %ld KBytes\n"; + string fmt = "fatal: " + format; + + switch (fmt[fmt.size() - 1]) { + case '\n': + case '\r': + break; + default: + fmt += "\n"; + } + + fmt += " @ cycle %d\n[%s:%s, line %d]\n"; + fmt += "Memory Usage: %ld KBytes\n"; args.append(curTick); args.append(func); @@ -83,15 +103,23 @@ __warn(const string &format, cp::ArgList &args, const char *func, const char *file, int line) { string fmt = "warn: " + format; + + switch (fmt[fmt.size() - 1]) { + case '\n': + case '\r': + break; + default: + fmt += "\n"; + } + #ifdef VERBOSE_WARN fmt += " @ cycle %d\n[%s:%s, line %d]\n"; args.append(curTick); args.append(func); args.append(file); args.append(line); -#else - fmt += "\n"; #endif + args.dump(cerr, fmt); delete &args; diff --git a/sim/main.cc b/sim/main.cc index d0cf230398..d2c56d9f28 100644 --- a/sim/main.cc +++ b/sim/main.cc @@ -400,6 +400,7 @@ main(int argc, char **argv) } SimInit(); + warn("Entering event queue. Starting simulation...\n"); while (!mainEventQueue.empty()) { assert(curTick <= mainEventQueue.nextTick() &&