From 3a2bf47d571dfa9db32c655c272e7d0f72dbfb74 Mon Sep 17 00:00:00 2001
From: Jarvis Jia <jia44@wisc.edu>
Date: Mon, 17 Jun 2024 03:27:25 -0500
Subject: [PATCH] Add default value and change Ruby address format specifier

Change-Id: I8fbaf34745e90589e610d3b9bd423937e7ebdc3d
---
 src/mem/ruby/protocol/GPU_VIPER-TCC.sm | 4 ++--
 src/mem/ruby/system/GPUCoalescer.hh    | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mem/ruby/protocol/GPU_VIPER-TCC.sm b/src/mem/ruby/protocol/GPU_VIPER-TCC.sm
index 5f0887b241..69a4cb8c73 100644
--- a/src/mem/ruby/protocol/GPU_VIPER-TCC.sm
+++ b/src/mem/ruby/protocol/GPU_VIPER-TCC.sm
@@ -655,12 +655,12 @@ machine(MachineType:TCC, "TCC Cache")
 
   action(p_profileMiss, "pm", desc="Profile cache miss") {
       L2cache.profileDemandMiss();
-      DPRINTF(RubyHitMiss, "in TCC miss at %p \n", address);
+      DPRINTF(RubyHitMiss, "in TCC miss at %#lx\n", address);
   }
 
   action(p_profileHit, "ph", desc="Profile cache hit") {
       L2cache.profileDemandHit();
-      DPRINTF(RubyHitMiss, "in TCC hit at %p \n", address);
+      DPRINTF(RubyHitMiss, "in TCC hit at %#lx\n", address);
   }
 
   action(t_allocateTBE, "t", desc="allocate TBE Entry") {
diff --git a/src/mem/ruby/system/GPUCoalescer.hh b/src/mem/ruby/system/GPUCoalescer.hh
index cc25cac958..21b2335a0e 100644
--- a/src/mem/ruby/system/GPUCoalescer.hh
+++ b/src/mem/ruby/system/GPUCoalescer.hh
@@ -292,7 +292,7 @@ class GPUCoalescer : public RubyPort
     void readCallback(Addr address,
                       MachineType mach,
                       DataBlock& data,
-                      bool externalHit);
+                      bool externalHit = false);
 
     void readCallback(Addr address,
                       MachineType mach,
@@ -300,7 +300,7 @@ class GPUCoalescer : public RubyPort
                       Cycles initialRequestTime,
                       Cycles forwardRequestTime,
                       Cycles firstResponseTime,
-                      bool externalHit);
+                      bool externalHit = false);
 
     void readCallback(Addr address,
                       MachineType mach,
@@ -309,7 +309,7 @@ class GPUCoalescer : public RubyPort
                       Cycles forwardRequestTime,
                       Cycles firstResponseTime,
                       bool isRegion,
-                      bool externalHit);
+                      bool externalHit = false);
 
     /* atomics need their own callback because the data
        might be const coming from SLICC */
@@ -396,7 +396,7 @@ class GPUCoalescer : public RubyPort
                      Cycles forwardRequestTime,
                      Cycles firstResponseTime,
                      bool isRegion,
-                     bool externalHit);
+                     bool externalHit = false);
 
     void recordMissLatency(CoalescedRequest* crequest,
                            MachineType mach,