diff --git a/src/arch/riscv/isa.cc b/src/arch/riscv/isa.cc
index 1280a77b87..61b86097f3 100644
--- a/src/arch/riscv/isa.cc
+++ b/src/arch/riscv/isa.cc
@@ -568,7 +568,7 @@ ISA::readMiscReg(RegIndex idx)
         }
       case MISCREG_VCSR:
         {
-            return readMiscRegNoEffect(MISCREG_VXSAT) &
+            return readMiscRegNoEffect(MISCREG_VXSAT) |
                   (readMiscRegNoEffect(MISCREG_VXRM) << 1);
         }
         break;