From 387caa007599df4d71da812cedfe38383a2a6ed4 Mon Sep 17 00:00:00 2001 From: Junshi Wang Date: Thu, 15 Aug 2024 14:08:26 +0800 Subject: [PATCH] arch-arm: Add place holder of registers. Add declaration of HAFGRTR_EL2 registers and read/write as GPR. Change-Id: I87570d1e87d479f4530cf2c6e05931cdc26ee361 Reviewed-by: Giacomo Travaglini --- src/arch/arm/regs/misc.cc | 4 ++++ src/arch/arm/regs/misc.hh | 2 ++ 2 files changed, 6 insertions(+) diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc index 17b652dfb1..cd0504f935 100644 --- a/src/arch/arm/regs/misc.cc +++ b/src/arch/arm/regs/misc.cc @@ -1259,6 +1259,7 @@ std::unordered_map miscRegNumToIdx{ { MiscRegNum64(3, 4, 3, 0, 0), MISCREG_DACR32_EL2 }, { MiscRegNum64(3, 4, 3, 1, 4), MISCREG_HDFGRTR_EL2 }, { MiscRegNum64(3, 4, 3, 1, 5), MISCREG_HDFGWTR_EL2 }, + { MiscRegNum64(3, 4, 3, 1, 6), MISCREG_HAFGRTR_EL2 }, { MiscRegNum64(3, 4, 4, 0, 0), MISCREG_SPSR_EL2 }, { MiscRegNum64(3, 4, 4, 0, 1), MISCREG_ELR_EL2 }, { MiscRegNum64(3, 4, 4, 1, 0), MISCREG_SP_EL1 }, @@ -6871,6 +6872,9 @@ ISA::initializeMiscRegMetadata() InitReg(MISCREG_HDFGWTR_EL2) .fault(EL2, faultFgtCtrlRegs) .hyp().mon(release->has(ArmExtension::FEAT_FGT)); + InitReg(MISCREG_HAFGRTR_EL2) + .fault(EL2, faultFgtCtrlRegs) + .hyp().mon(release->has(ArmExtension::FEAT_FGT)); // Dummy registers InitReg(MISCREG_NOP) diff --git a/src/arch/arm/regs/misc.hh b/src/arch/arm/regs/misc.hh index 288de96d22..a7e50954a5 100644 --- a/src/arch/arm/regs/misc.hh +++ b/src/arch/arm/regs/misc.hh @@ -1165,6 +1165,7 @@ namespace ArmISA MISCREG_HFGWTR_EL2, MISCREG_HDFGRTR_EL2, MISCREG_HDFGWTR_EL2, + MISCREG_HAFGRTR_EL2, // FEAT_MPAM MISCREG_MPAMIDR_EL1, @@ -2912,6 +2913,7 @@ namespace ArmISA "hfgwtr_el2", "hdfgrtr_el2", "hdfgwtr_el2", + "hafgrtr_el2", // FEAT_MPAM "mpamidr_el1",