From 37e41733515b97127f6d9605d7fd991056a4f5af Mon Sep 17 00:00:00 2001
From: "Bobby R. Bruce" <bbruce@ucdavis.edu>
Date: Tue, 12 Dec 2023 08:21:27 -0800
Subject: [PATCH] arch-x86: Fix two_byte_opcodes.isa `0x6` -> `0x0` (#666)

This bug was introduced by https://github.com/gem5/gem5/pull/593 and
caused Issue https://github.com/gem5/gem5/issues/664.

Change-Id: Ia55de364ee8260e1fe315e37e1cffbc71ab229fb
---
 src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index 48c3a2d20d..a32d41a169 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -291,7 +291,7 @@
                 0x0: decode LEGACY_DECODEVAL {
                     // no prefix
                     0x0: decode OPCODE_OP_BOTTOM3 {
-                        0x6: Cpl0CondInst::MOV(
+                        0x0: Cpl0CondInst::MOV(
                             {{misc_reg::isValid(misc_reg::cr(MODRM_REG))}},Rd,Cd);
                         0x1: Cpl0CondInst::MOV({{MODRM_REG < 8}},Rd,Dd);
                         0x2: Cpl0CondInst::MOV(