From 089d780c768130d08e1a9e2e77487fd8e5a804ce Mon Sep 17 00:00:00 2001
From: Zhibo Hong <hongzhibo@bytedance.com>
Date: Wed, 23 Oct 2024 17:24:43 +0800
Subject: [PATCH] arch-riscv: Fix the bug of vsetivli frequently flushing the
 pipeline

Change-Id: I5bede47919c06cea86fa23a81624b502fbdc1159
---
 src/arch/riscv/isa/formats/vector_conf.isa | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/arch/riscv/isa/formats/vector_conf.isa b/src/arch/riscv/isa/formats/vector_conf.isa
index 2875c4cb00..3f2ee4a526 100644
--- a/src/arch/riscv/isa/formats/vector_conf.isa
+++ b/src/arch/riscv/isa/formats/vector_conf.isa
@@ -202,6 +202,7 @@ def template VSetiVliBranchTarget {{
             rpc.vl(), requested_vl, vlmax, rd_bits, rs1_bits);
 
         std::unique_ptr<PCState> npc(dynamic_cast<PCState*>(rpc.clone()));
+        npc->set(rvSext(npc->pc() + 4));
         npc->vtype(new_vtype);
         npc->vl(new_vl);
         return npc;