arch: Use const StaticInstPtr references where possible

This patch optimises the passing of StaticInstPtr by avoiding copying
the reference-counting pointer. This avoids first incrementing and
then decrementing the reference-counting pointer.

src/arch/alpha/faults.cc

@@ -106,7 +106,7 @@ FaultVect IntegerOverflowFault::_vect = 0x0501;
 FaultStat IntegerOverflowFault::_count;
 
 void
-AlphaFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+AlphaFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     FaultBase::invoke(tc);
     if (!FullSystem)
@@ -130,7 +130,7 @@ AlphaFault::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-ArithmeticFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+ArithmeticFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     FaultBase::invoke(tc);
     if (!FullSystem)
@@ -139,7 +139,7 @@ ArithmeticFault::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-DtbFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+DtbFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         // Set fault address and flags.  Even though we're modeling an
@@ -169,7 +169,7 @@ DtbFault::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-ItbFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+ItbFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         if (!tc->misspeculating()) {
@@ -183,7 +183,7 @@ ItbFault::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-ItbPageFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+ItbPageFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         ItbFault::invoke(tc);
@@ -202,7 +202,7 @@ ItbPageFault::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-NDtbMissFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+NDtbMissFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         DtbFault::invoke(tc, inst);

src/arch/alpha/faults.hh

@@ -48,8 +48,8 @@ class AlphaFault : public FaultBase
     virtual bool skipFaultingInstruction() {return false;}
     virtual bool setRestartAddress() {return true;}
   public:
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
     virtual FaultVect vect() = 0;
     virtual FaultStat & countStat() = 0;
 };
@@ -108,8 +108,8 @@ class ArithmeticFault : public AlphaFault
     FaultName name() const {return _name;}
     FaultVect vect() {return _vect;}
     FaultStat & countStat() {return _count;}
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class InterruptFault : public AlphaFault
@@ -142,8 +142,8 @@ class DtbFault : public AlphaFault
     FaultName name() const = 0;
     FaultVect vect() = 0;
     FaultStat & countStat() = 0;
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class NDtbMissFault : public DtbFault
@@ -160,8 +160,8 @@ class NDtbMissFault : public DtbFault
     FaultName name() const {return _name;}
     FaultVect vect() {return _vect;}
     FaultStat & countStat() {return _count;}
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class PDtbMissFault : public DtbFault
@@ -238,8 +238,8 @@ class ItbFault : public AlphaFault
     FaultName name() const = 0;
     FaultVect vect() = 0;
     FaultStat & countStat() = 0;
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class ItbPageFault : public ItbFault
@@ -254,8 +254,8 @@ class ItbPageFault : public ItbFault
     FaultName name() const {return _name;}
     FaultVect vect() {return _vect;}
     FaultStat & countStat() {return _count;}
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class ItbAcvFault : public ItbFault

src/arch/alpha/stacktrace.cc

@@ -122,7 +122,7 @@ StackTrace::StackTrace()
 {
 }
 
-StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
+StackTrace::StackTrace(ThreadContext *_tc, const StaticInstPtr &inst)
     : tc(0), stack(64)
 {
     trace(_tc, inst);

src/arch/alpha/stacktrace.hh

@@ -76,7 +76,7 @@ class StackTrace
 
   public:
     StackTrace();
-    StackTrace(ThreadContext *tc, StaticInstPtr inst);
+    StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
     ~StackTrace();
 
     void
@@ -87,7 +87,7 @@ class StackTrace
     }
 
     bool valid() const { return tc != NULL; }
-    bool trace(ThreadContext *tc, StaticInstPtr inst);
+    bool trace(ThreadContext *tc, const StaticInstPtr &inst);
 
   public:
     const std::vector<Addr> &getstack() const { return stack; }
@@ -111,7 +111,7 @@ class StackTrace
 };
 
 inline bool
-StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
+StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (!inst->isCall() && !inst->isReturn())
         return false;

src/arch/alpha/utility.hh

@@ -105,7 +105,7 @@ void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
 void skipFunction(ThreadContext *tc);
 
 inline void
-advancePC(PCState &pc, const StaticInstPtr inst)
+advancePC(PCState &pc, const StaticInstPtr &inst)
 {
     pc.advance();
 }

src/arch/arm/faults.cc

@@ -426,7 +426,7 @@ ArmFault::setSyndrome(ThreadContext *tc, MiscRegIndex syndrome_reg)
 }
 
 void
-ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+ArmFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
 
@@ -587,7 +587,7 @@ ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-ArmFault::invoke64(ThreadContext *tc, StaticInstPtr inst)
+ArmFault::invoke64(ThreadContext *tc, const StaticInstPtr &inst)
 {
     // Determine actual misc. register indices for ELR_ELx and SPSR_ELx
     MiscRegIndex elr_idx, spsr_idx;
@@ -678,7 +678,7 @@ ArmFault::invoke64(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-Reset::invoke(ThreadContext *tc, StaticInstPtr inst)
+Reset::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         tc->getCpuPtr()->clearInterrupts();
@@ -706,7 +706,7 @@ Reset::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-UndefinedInstruction::invoke(ThreadContext *tc, StaticInstPtr inst)
+UndefinedInstruction::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         ArmFault::invoke(tc, inst);
@@ -767,7 +767,7 @@ UndefinedInstruction::iss() const
 }
 
 void
-SupervisorCall::invoke(ThreadContext *tc, StaticInstPtr inst)
+SupervisorCall::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         ArmFault::invoke(tc, inst);
@@ -884,7 +884,7 @@ ArmFaultVals<T>::offset(ThreadContext *tc)
 // }
 
 void
-SecureMonitorCall::invoke(ThreadContext *tc, StaticInstPtr inst)
+SecureMonitorCall::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         ArmFault::invoke(tc, inst);
@@ -913,7 +913,7 @@ SecureMonitorTrap::ec(ThreadContext *tc) const
 
 template<class T>
 void
-AbortFault<T>::invoke(ThreadContext *tc, StaticInstPtr inst)
+AbortFault<T>::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (tranMethod == ArmFault::UnknownTran) {
         tranMethod = longDescFormatInUse(tc) ? ArmFault::LpaeTran
@@ -1237,7 +1237,7 @@ DataAbort::annotate(AnnotationIDs id, uint64_t val)
 }
 
 void
-VirtualDataAbort::invoke(ThreadContext *tc, StaticInstPtr inst)
+VirtualDataAbort::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     AbortFault<VirtualDataAbort>::invoke(tc, inst);
     HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR);
@@ -1336,7 +1336,7 @@ VirtualFastInterrupt::VirtualFastInterrupt()
 {}
 
 void
-PCAlignmentFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+PCAlignmentFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     ArmFaultVals<PCAlignmentFault>::invoke(tc, inst);
     assert(from64);
@@ -1351,7 +1351,7 @@ SystemError::SystemError()
 {}
 
 void
-SystemError::invoke(ThreadContext *tc, StaticInstPtr inst)
+SystemError::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     tc->getCpuPtr()->clearInterrupt(INT_ABT, 0);
     ArmFault::invoke(tc, inst);
@@ -1382,7 +1382,7 @@ SystemError::routeToHyp(ThreadContext *tc) const
 }
 
 void
-FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) {
+FlushPipe::invoke(ThreadContext *tc, const StaticInstPtr &inst) {
     DPRINTF(Faults, "Invoking FlushPipe Fault\n");
 
     // Set the PC to the next instruction of the faulting instruction.
@@ -1395,7 +1395,7 @@ FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) {
 }
 
 void
-ArmSev::invoke(ThreadContext *tc, StaticInstPtr inst) {
+ArmSev::invoke(ThreadContext *tc, const StaticInstPtr &inst) {
     DPRINTF(Faults, "Invoking ArmSev Fault\n");
     if (!FullSystem)
         return;

src/arch/arm/faults.hh

@@ -181,10 +181,10 @@ class ArmFault : public FaultBase
     // exception level
     MiscRegIndex getFaultAddrReg64() const;
 
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
-    void invoke64(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
+    void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
+                  StaticInst::nullStaticInstPtr);
     virtual void annotate(AnnotationIDs id, uint64_t val) {}
     virtual FaultStat& countStat() = 0;
     virtual FaultOffset offset(ThreadContext *tc) = 0;
@@ -249,8 +249,8 @@ class ArmFaultVals : public ArmFault
 class Reset : public ArmFaultVals<Reset>
 {
   public:
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
@@ -277,8 +277,8 @@ class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
         mnemonic(_mnemonic)
     {}
 
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
     bool routeToHyp(ThreadContext *tc) const;
     ExceptionClass ec(ThreadContext *tc) const;
     uint32_t iss() const;
@@ -295,8 +295,8 @@ class SupervisorCall : public ArmFaultVals<SupervisorCall>
         overrideEc(_overrideEc)
     {}
 
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
     bool routeToHyp(ThreadContext *tc) const;
     ExceptionClass ec(ThreadContext *tc) const;
     uint32_t iss() const;
@@ -309,8 +309,8 @@ class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall>
         ArmFaultVals<SecureMonitorCall>(_machInst)
     {}
 
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
     ExceptionClass ec(ThreadContext *tc) const;
     uint32_t iss() const;
 };
@@ -401,8 +401,8 @@ class AbortFault : public ArmFaultVals<T>
         stage2(_stage2), s1ptw(false), tranMethod(_tranMethod)
     {}
 
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 
     FSR getFsr(ThreadContext *tc);
     bool abortDisable(ThreadContext *tc);
@@ -473,7 +473,7 @@ class VirtualDataAbort : public AbortFault<VirtualDataAbort>
         AbortFault<VirtualDataAbort>(_addr, _write, _domain, _source, false)
     {}
 
-    void invoke(ThreadContext *tc, StaticInstPtr inst);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst);
 };
 
 class Interrupt : public ArmFaultVals<Interrupt>
@@ -514,8 +514,8 @@ class PCAlignmentFault : public ArmFaultVals<PCAlignmentFault>
   public:
     PCAlignmentFault(Addr _faultPC) : faultPC(_faultPC)
     {}
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 /// Stack pointer alignment fault (AArch64 only)
@@ -530,8 +530,8 @@ class SystemError : public ArmFaultVals<SystemError>
 {
   public:
     SystemError();
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
     bool routeToMonitor(ThreadContext *tc) const;
     bool routeToHyp(ThreadContext *tc) const;
 };
@@ -541,8 +541,8 @@ class FlushPipe : public ArmFaultVals<FlushPipe>
 {
   public:
     FlushPipe() {}
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 // A fault that flushes the pipe, excluding the faulting instructions
@@ -550,8 +550,8 @@ class ArmSev : public ArmFaultVals<ArmSev>
 {
   public:
     ArmSev () {}
-    void invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 /// Illegal Instruction Set State fault (AArch64 only)

src/arch/arm/stacktrace.cc

@@ -121,7 +121,7 @@ namespace ArmISA
     {
     }
 
-    StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
+    StackTrace::StackTrace(ThreadContext *_tc, const StaticInstPtr &inst)
         : tc(0), stack(64)
     {
         trace(_tc, inst);

src/arch/arm/stacktrace.hh

@@ -78,7 +78,7 @@ class StackTrace
 
   public:
     StackTrace();
-    StackTrace(ThreadContext *tc, StaticInstPtr inst);
+    StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
     ~StackTrace();
 
     void clear()
@@ -88,7 +88,7 @@ class StackTrace
     }
 
     bool valid() const { return tc != NULL; }
-    bool trace(ThreadContext *tc, StaticInstPtr inst);
+    bool trace(ThreadContext *tc, const StaticInstPtr &inst);
 
   public:
     const std::vector<Addr> &getstack() const { return stack; }
@@ -106,7 +106,7 @@ class StackTrace
 };
 
 inline bool
-StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
+StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (!inst->isCall() && !inst->isReturn())
         return false;

src/arch/arm/utility.hh

@@ -279,7 +279,7 @@ uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
 void skipFunction(ThreadContext *tc);
 
 inline void
-advancePC(PCState &pc, const StaticInstPtr inst)
+advancePC(PCState &pc, const StaticInstPtr &inst)
 {
     inst->advancePC(pc);
 }

src/arch/generic/debugfaults.hh

@@ -86,8 +86,8 @@ class M5DebugFault : public FaultBase
     }
 
     void
-    invoke(ThreadContext *tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr)
+    invoke(ThreadContext *tc, const StaticInstPtr &inst =
+           StaticInst::nullStaticInstPtr)
     {
         switch (func) {
           case PanicFunc:

src/arch/mips/faults.cc

@@ -131,7 +131,7 @@ MipsFaultBase::setExceptionState(ThreadContext *tc, uint8_t excCode)
 }
 
 void
-MipsFaultBase::invoke(ThreadContext *tc, StaticInstPtr inst)
+MipsFaultBase::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         DPRINTF(MipsPRA, "Fault %s encountered.\n", name());
@@ -143,7 +143,7 @@ MipsFaultBase::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-ResetFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+ResetFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         DPRINTF(MipsPRA, "%s encountered.\n", name());
@@ -160,13 +160,13 @@ ResetFault::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-SoftResetFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+SoftResetFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     panic("Soft reset not implemented.\n");
 }
 
 void
-NonMaskableInterrupt::invoke(ThreadContext *tc, StaticInstPtr inst)
+NonMaskableInterrupt::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     panic("Non maskable interrupt not implemented.\n");
 }

src/arch/mips/faults.hh

@@ -102,8 +102,8 @@ class MipsFaultBase : public FaultBase
         return base(tc) + offset(tc);
     }
 
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 template <typename T>
@@ -134,23 +134,23 @@ class MachineCheckFault : public MipsFault<MachineCheckFault>
 class ResetFault : public MipsFault<ResetFault>
 {
   public:
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 
 };
 
 class SoftResetFault : public MipsFault<SoftResetFault>
 {
   public:
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class NonMaskableInterrupt : public MipsFault<NonMaskableInterrupt>
 {
   public:
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class CoprocessorUnusableFault : public MipsFault<CoprocessorUnusableFault>
@@ -162,8 +162,8 @@ class CoprocessorUnusableFault : public MipsFault<CoprocessorUnusableFault>
     {}
 
     void
-    invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr)
+    invoke(ThreadContext * tc, const StaticInstPtr &inst =
+           StaticInst::nullStaticInstPtr)
     {
         MipsFault<CoprocessorUnusableFault>::invoke(tc, inst);
         if (FullSystem) {
@@ -197,8 +197,8 @@ class AddressFault : public MipsFault<T>
     {}
 
     void
-    invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr)
+    invoke(ThreadContext * tc, const StaticInstPtr &inst =
+           StaticInst::nullStaticInstPtr)
     {
         MipsFault<T>::invoke(tc, inst);
         if (FullSystem)
@@ -250,8 +250,8 @@ class TlbFault : public AddressFault<T>
     }
 
     void
-    invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr)
+    invoke(ThreadContext * tc, const StaticInstPtr &inst =
+           StaticInst::nullStaticInstPtr)
     {
         if (FullSystem) {
             DPRINTF(MipsPRA, "Fault %s encountered.\n", this->name());

src/arch/mips/stacktrace.cc

@@ -96,7 +96,7 @@ StackTrace::StackTrace()
 {
 }
 
-StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
+StackTrace::StackTrace(ThreadContext *_tc, const StaticInstPtr &inst)
     : tc(0), stack(64)
 {
     trace(_tc, inst);

src/arch/mips/stacktrace.hh

@@ -75,7 +75,7 @@ class StackTrace
 
   public:
     StackTrace();
-    StackTrace(ThreadContext *tc, StaticInstPtr inst);
+    StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
     ~StackTrace();
 
     void clear()
@@ -85,7 +85,7 @@ class StackTrace
     }
 
     bool valid() const { return tc != NULL; }
-    bool trace(ThreadContext *tc, StaticInstPtr inst);
+    bool trace(ThreadContext *tc, const StaticInstPtr &inst);
 
   public:
     const std::vector<Addr> &getstack() const { return stack; }
@@ -107,7 +107,7 @@ class StackTrace
 };
 
 inline bool
-StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
+StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (!inst->isCall() && !inst->isReturn())
         return false;

src/arch/mips/utility.hh

@@ -115,7 +115,7 @@ void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
 void skipFunction(ThreadContext *tc);
 
 inline void
-advancePC(PCState &pc, const StaticInstPtr inst)
+advancePC(PCState &pc, const StaticInstPtr &inst)
 {
     pc.advance();
 }

src/arch/power/stacktrace.cc

@@ -69,7 +69,7 @@ StackTrace::StackTrace()
     panic("StackTrace constructor not implemented.\n");
 }
 
-StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
+StackTrace::StackTrace(ThreadContext *_tc, const StaticInstPtr &inst)
     : tc(0), stack(64)
 {
     panic("StackTrace constructor not implemented.\n");

src/arch/power/stacktrace.hh

@@ -73,7 +73,7 @@ class StackTrace
 
   public:
     StackTrace();
-    StackTrace(ThreadContext *tc, StaticInstPtr inst);
+    StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
     ~StackTrace();
 
     void
@@ -89,7 +89,7 @@ class StackTrace
         return tc != NULL;
     }
 
-    bool trace(ThreadContext *tc, StaticInstPtr inst);
+    bool trace(ThreadContext *tc, const StaticInstPtr &inst);
 
   public:
     const std::vector<Addr> &
@@ -123,7 +123,7 @@ class StackTrace
 };
 
 inline bool
-StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
+StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (!inst->isCall() && !inst->isReturn())
         return false;

src/arch/power/utility.hh

@@ -73,7 +73,7 @@ copyMiscRegs(ThreadContext *src, ThreadContext *dest)
 void skipFunction(ThreadContext *tc);
 
 inline void
-advancePC(PCState &pc, const StaticInstPtr inst)
+advancePC(PCState &pc, const StaticInstPtr &inst)
 {
     pc.advance();
 }

src/arch/sparc/faults.cc

@@ -490,7 +490,7 @@ getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, MiscReg TT, MiscReg TL)
 }
 
 void
-SparcFaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
+SparcFaultBase::invoke(ThreadContext * tc, const StaticInstPtr &inst)
 {
     FaultBase::invoke(tc);
     if (!FullSystem)
@@ -551,7 +551,7 @@ SparcFaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
 }
 
 void
-PowerOnReset::invoke(ThreadContext *tc, StaticInstPtr inst)
+PowerOnReset::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     // For SPARC, when a system is first started, there is a power
     // on reset Trap which sets the processor into the following state.
@@ -614,7 +614,8 @@ PowerOnReset::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
+FastInstructionAccessMMUMiss::invoke(ThreadContext *tc,
+                                     const StaticInstPtr &inst)
 {
     if (FullSystem) {
         SparcFaultBase::invoke(tc, inst);
@@ -634,7 +635,7 @@ FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
+FastDataAccessMMUMiss::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         SparcFaultBase::invoke(tc, inst);
@@ -658,7 +659,7 @@ FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
+SpillNNormal::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         SparcFaultBase::invoke(tc, inst);
@@ -678,7 +679,7 @@ SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
+FillNNormal::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         SparcFaultBase::invoke(tc, inst);
@@ -698,7 +699,7 @@ FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
 }
 
 void
-TrapInstruction::invoke(ThreadContext *tc, StaticInstPtr inst)
+TrapInstruction::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (FullSystem) {
         SparcFaultBase::invoke(tc, inst);

src/arch/sparc/faults.hh

@@ -65,8 +65,8 @@ class SparcFaultBase : public FaultBase
         const PrivilegeLevel nextPrivilegeLevel[NumLevels];
         FaultStat count;
     };
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
     virtual TrapType trapType() = 0;
     virtual FaultPriority priority() = 0;
     virtual FaultStat & countStat() = 0;
@@ -93,8 +93,8 @@ class SparcFault : public SparcFaultBase
 
 class PowerOnReset : public SparcFault<PowerOnReset>
 {
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class WatchDogReset : public SparcFault<WatchDogReset> {};
@@ -206,8 +206,8 @@ class FastInstructionAccessMMUMiss :
     {}
     FastInstructionAccessMMUMiss() : vaddr(0)
     {}
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
@@ -219,8 +219,8 @@ class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
     {}
     FastDataAccessMMUMiss() : vaddr(0)
     {}
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
@@ -238,8 +238,8 @@ class SpillNNormal : public EnumeratedFault<SpillNNormal>
   public:
     SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
     // These need to be handled specially to enable spill traps in SE
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class SpillNOther : public EnumeratedFault<SpillNOther>
@@ -255,8 +255,8 @@ class FillNNormal : public EnumeratedFault<FillNNormal>
     FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n)
     {}
     // These need to be handled specially to enable fill traps in SE
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 class FillNOther : public EnumeratedFault<FillNOther>
@@ -272,8 +272,8 @@ class TrapInstruction : public EnumeratedFault<TrapInstruction>
     TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n)
     {}
     // In SE, trap instructions are requesting services from the OS.
-    void invoke(ThreadContext * tc,
-            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                StaticInst::nullStaticInstPtr);
 };
 
 void enterREDState(ThreadContext *tc);

src/arch/sparc/stacktrace.hh

@@ -48,7 +48,7 @@ class StackTrace
 
   public:
     bool
-    trace(ThreadContext *tc, StaticInstPtr inst)
+    trace(ThreadContext *tc, const StaticInstPtr &inst)
     {
         panic("StackTrace::trace not implemented for SPARC.\n");
         return false;

src/arch/sparc/utility.hh

@@ -87,7 +87,7 @@ void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
 void skipFunction(ThreadContext *tc);
 
 inline void
-advancePC(PCState &pc, const StaticInstPtr inst)
+advancePC(PCState &pc, const StaticInstPtr &inst)
 {
     inst->advancePC(pc);
 }

src/arch/x86/faults.cc

@@ -50,7 +50,7 @@
 
 namespace X86ISA
 {
-    void X86FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
+    void X86FaultBase::invoke(ThreadContext * tc, const StaticInstPtr &inst)
     {
         if (!FullSystem) {
             FaultBase::invoke(tc, inst);
@@ -104,7 +104,7 @@ namespace X86ISA
         return ss.str();
     }
     
-    void X86Trap::invoke(ThreadContext * tc, StaticInstPtr inst)
+    void X86Trap::invoke(ThreadContext * tc, const StaticInstPtr &inst)
     {
         X86FaultBase::invoke(tc);
         if (!FullSystem)
@@ -116,13 +116,13 @@ namespace X86ISA
         pc.uEnd();
     }
 
-    void X86Abort::invoke(ThreadContext * tc, StaticInstPtr inst)
+    void X86Abort::invoke(ThreadContext * tc, const StaticInstPtr &inst)
     {
         panic("Abort exception!");
     }
 
     void
-    InvalidOpcode::invoke(ThreadContext * tc, StaticInstPtr inst)
+    InvalidOpcode::invoke(ThreadContext * tc, const StaticInstPtr &inst)
     {
         if (FullSystem) {
             X86Fault::invoke(tc, inst);
@@ -132,7 +132,7 @@ namespace X86ISA
         }
     }
 
-    void PageFault::invoke(ThreadContext * tc, StaticInstPtr inst)
+    void PageFault::invoke(ThreadContext * tc, const StaticInstPtr &inst)
     {
         if (FullSystem) {
             HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
@@ -170,7 +170,7 @@ namespace X86ISA
     }
 
     void
-    InitInterrupt::invoke(ThreadContext *tc, StaticInstPtr inst)
+    InitInterrupt::invoke(ThreadContext *tc, const StaticInstPtr &inst)
     {
         DPRINTF(Faults, "Init interrupt.\n");
         // The otherwise unmodified integer registers should be set to 0.
@@ -288,7 +288,7 @@ namespace X86ISA
     }
 
     void
-    StartupInterrupt::invoke(ThreadContext *tc, StaticInstPtr inst)
+    StartupInterrupt::invoke(ThreadContext *tc, const StaticInstPtr &inst)
     {
         DPRINTF(Faults, "Startup interrupt with vector %#x.\n", vector);
         HandyM5Reg m5Reg = tc->readMiscReg(MISCREG_M5_REG);

src/arch/x86/faults.hh

@@ -85,8 +85,8 @@ namespace X86ISA
             return false;
         }
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr);
 
         virtual std::string describe() const;
 
@@ -120,8 +120,8 @@ namespace X86ISA
             : X86FaultBase(name, mnem, vector, _errorCode)
         {}
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr);
     };
 
     // Base class for x86 aborts which seem to be catastrophic failures.
@@ -133,8 +133,8 @@ namespace X86ISA
             : X86FaultBase(name, mnem, vector, _errorCode)
         {}
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr);
     };
 
     // Base class for x86 interrupts.
@@ -155,8 +155,8 @@ namespace X86ISA
             return "unimplemented_micro";
         }
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr)
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr)
         {
             panic("Unimplemented instruction!");
         }
@@ -248,8 +248,8 @@ namespace X86ISA
             X86Fault("Invalid-Opcode", "#UD", 6)
         {}
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr);
     };
 
     class DeviceNotAvailable : public X86Fault
@@ -331,8 +331,8 @@ namespace X86ISA
             errorCode = code;
         }
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr);
 
         virtual std::string describe() const;
     };
@@ -400,8 +400,8 @@ namespace X86ISA
             X86Interrupt("INIT Interrupt", "#INIT", _vector)
         {}
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr);
     };
 
     class StartupInterrupt : public X86Interrupt
@@ -411,8 +411,8 @@ namespace X86ISA
             X86Interrupt("Startup Interrupt", "#SIPI", _vector)
         {}
 
-        void invoke(ThreadContext * tc,
-                StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+        void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                    StaticInst::nullStaticInstPtr);
     };
 
     class SoftwareInterrupt : public X86Interrupt

src/arch/x86/stacktrace.cc

@@ -121,7 +121,7 @@ namespace X86ISA
     {
     }
 
-    StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
+    StackTrace::StackTrace(ThreadContext *_tc, const StaticInstPtr &inst)
         : tc(0), stack(64)
     {
         trace(_tc, inst);

src/arch/x86/stacktrace.hh

@@ -75,7 +75,7 @@ namespace X86ISA
 
       public:
         StackTrace();
-        StackTrace(ThreadContext *tc, StaticInstPtr inst);
+        StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
         ~StackTrace();
 
         void clear()
@@ -85,7 +85,7 @@ namespace X86ISA
         }
 
         bool valid() const { return tc != NULL; }
-        bool trace(ThreadContext *tc, StaticInstPtr inst);
+        bool trace(ThreadContext *tc, const StaticInstPtr &inst);
 
       public:
         const std::vector<Addr> &getstack() const { return stack; }
@@ -107,7 +107,7 @@ namespace X86ISA
     };
 
     inline bool
-    StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
+    StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst)
     {
         if (!inst->isCall() && !inst->isReturn())
             return false;

src/arch/x86/utility.hh

@@ -94,7 +94,7 @@ namespace X86ISA
     void skipFunction(ThreadContext *tc);
 
     inline void
-    advancePC(PCState &pc, const StaticInstPtr inst)
+    advancePC(PCState &pc, const StaticInstPtr &inst)
     {
         inst->advancePC(pc);
     }