From 33a36d35dea1ac9ed9e2b45d85ed78f6c5aae600 Mon Sep 17 00:00:00 2001 From: Matthew Poremba Date: Thu, 17 Nov 2022 08:54:43 -0800 Subject: [PATCH] dev-amdgpu: Store SDMA queue type, use for ring ID Currently the SDMA queue type is guessed in the trap method by looking at which queue in the engine is processing packets. It is possible for both queues to be processing (e.g., one queue sent a DMA and is waiting then switch to another queue), triggering an assert. Instead store the queue type in the queue itself and use that type in trap to determine which ring ID to use for the interrupt packet. Change-Id: If91c458e60a03f2013c0dc42bab0b1673e3dbd84 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65691 Maintainer: Jason Lowe-Power Reviewed-by: Jason Lowe-Power Tested-by: kokoro --- src/dev/amdgpu/sdma_engine.cc | 10 +++++----- src/dev/amdgpu/sdma_engine.hh | 5 ++++- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/src/dev/amdgpu/sdma_engine.cc b/src/dev/amdgpu/sdma_engine.cc index 59c5027c85..02203c8178 100644 --- a/src/dev/amdgpu/sdma_engine.cc +++ b/src/dev/amdgpu/sdma_engine.cc @@ -55,11 +55,15 @@ SDMAEngine::SDMAEngine(const SDMAEngineParams &p) gfxIb.parent(&gfx); gfx.valid(true); gfxIb.valid(true); + gfx.queueType(SDMAGfx); + gfxIb.queueType(SDMAGfx); page.ib(&pageIb); pageIb.parent(&page); page.valid(true); pageIb.valid(true); + page.queueType(SDMAPage); + pageIb.queueType(SDMAPage); rlc0.ib(&rlc0Ib); rlc0Ib.parent(&rlc0); @@ -727,11 +731,7 @@ SDMAEngine::trap(SDMAQueue *q, sdmaTrap *pkt) DPRINTF(SDMAEngine, "Trap contextId: %p\n", pkt->intrContext); - uint32_t ring_id = 0; - assert(page.processing() ^ gfx.processing()); - if (page.processing()) { - ring_id = 3; - } + uint32_t ring_id = (q->queueType() == SDMAPage) ? 3 : 0; gpuDevice->getIH()->prepareInterruptCookie(pkt->intrContext, ring_id, getIHClientId(), TRAP_ID); diff --git a/src/dev/amdgpu/sdma_engine.hh b/src/dev/amdgpu/sdma_engine.hh index d0afaf7a4a..0bfee126c9 100644 --- a/src/dev/amdgpu/sdma_engine.hh +++ b/src/dev/amdgpu/sdma_engine.hh @@ -64,9 +64,10 @@ class SDMAEngine : public DmaVirtDevice bool _processing; SDMAQueue *_parent; SDMAQueue *_ib; + SDMAType _type; public: SDMAQueue() : _rptr(0), _wptr(0), _valid(false), _processing(false), - _parent(nullptr), _ib(nullptr) {} + _parent(nullptr), _ib(nullptr), _type(SDMAGfx) {} Addr base() { return _base; } Addr rptr() { return _base + _rptr; } @@ -80,6 +81,7 @@ class SDMAEngine : public DmaVirtDevice bool processing() { return _processing; } SDMAQueue* parent() { return _parent; } SDMAQueue* ib() { return _ib; } + SDMAType queueType() { return _type; } void base(Addr value) { _base = value; } @@ -111,6 +113,7 @@ class SDMAEngine : public DmaVirtDevice void processing(bool value) { _processing = value; } void parent(SDMAQueue* q) { _parent = q; } void ib(SDMAQueue* ib) { _ib = ib; } + void queueType(SDMAType type) { _type = type; } }; /* SDMA Engine ID */