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mem: HBMCtrl changes to allow PC data buses to be in different states

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This change updates the HBMCtrl such that both pseudo channels
can be in separate states (read or write) at the same time. In
addition, the controller queues are now always split in two
halves for both pseudo channels.

Change-Id: Ifb599e611ad99f6c511baaf245bad2b5c9210a86
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65491
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Ayaz Akram
2022-11-10 13:26:44 -08:00
parent 65d077d795
commit 32df25e426
12 changed files with 122 additions and 116 deletions
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6
src/mem/mem_ctrl.hh
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@@ -517,8 +517,6 @@ class MemCtrl : public qos::MemCtrl
uint32_t writeLowThreshold;
const uint32_t minWritesPerSwitch;
const uint32_t minReadsPerSwitch;
uint32_t writesThisTime;
uint32_t readsThisTime;
/**
* Memory controller configuration initialized based on parameter
@@ -764,7 +762,7 @@ class MemCtrl : public qos::MemCtrl
* @param next_state Check either the current or next bus state
* @return True when bus is currently in a read state
*/
bool inReadBusState(bool next_state) const;
bool inReadBusState(bool next_state, const MemInterface* mem_intr) const;
/**
* Check the current direction of the memory channel
@@ -772,7 +770,7 @@ class MemCtrl : public qos::MemCtrl
* @param next_state Check either the current or next bus state
* @return True when bus is currently in a write state
*/
bool inWriteBusState(bool next_state) const;
bool inWriteBusState(bool next_state, const MemInterface* mem_intr) const;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;