From 32b4ab376c08b48cf973dbafc3a7119a76c642cb Mon Sep 17 00:00:00 2001
From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Tue, 7 Feb 2023 10:56:30 +0000
Subject: [PATCH] arch-arm: Update MISCREG_DBGDIDR to point to Armv8 debug arch

Change-Id: I20691ecdaedde6740c706782635b1f9a4491dc51
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70561
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---
 src/arch/arm/regs/misc.cc | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc
index 6c5a9ddac9..6f918b2a6e 100644
--- a/src/arch/arm/regs/misc.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -2273,10 +2273,7 @@ ISA::initializeMiscRegMetadata()
 
     // AArch32 CP14 registers
     InitReg(MISCREG_DBGDIDR)
-      /* For now just implement the version number.
-       * ARMv7, v7.1 Debug architecture (0b0101 --> 0x5)
-       */
-      .reset(0x5 << 16)
+      .reset(0x6 << 16) // Armv8 Debug architecture
       .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
     InitReg(MISCREG_DBGDSCRint)
       .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);