Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem --HG-- extra : convert_revision : 88fa7ae5cc32be068787ee381fae9d8de0e9bd0f
This commit is contained in:
@@ -35,7 +35,7 @@
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#include <queue>
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#include <string>
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#include "arch/faults.hh"
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#include "sim/faults.hh"
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#include "base/timebuf.hh"
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#include "cpu/inst_seq.hh"
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#include "cpu/ozone/rename_table.hh"
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@@ -28,7 +28,7 @@
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* Authors: Kevin Lim
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*/
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#include "arch/faults.hh"
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#include "sim/faults.hh"
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#include "config/full_system.hh"
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#include "cpu/ozone/dyn_inst.hh"
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#include "kern/kernel_stats.hh"
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@@ -30,7 +30,7 @@
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#include "config/use_checker.hh"
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#include "arch/faults.hh"
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#include "sim/faults.hh"
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#include "arch/isa_traits.hh"
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#include "arch/utility.hh"
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#include "base/statistics.hh"
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@@ -33,7 +33,7 @@
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#include <list>
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#include "arch/faults.hh"
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#include "sim/faults.hh"
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#include "base/timebuf.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/inst_seq.hh"
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@@ -28,7 +28,7 @@
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* Authors: Kevin Lim
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*/
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#include "arch/faults.hh"
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#include "sim/faults.hh"
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#include "arch/types.hh"
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#include "cpu/ozone/inorder_back_end.hh"
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#include "cpu/ozone/thread_state.hh"
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@@ -36,7 +36,7 @@
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#include <set>
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#include <string>
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#include "arch/faults.hh"
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#include "sim/faults.hh"
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#include "base/timebuf.hh"
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#include "cpu/inst_seq.hh"
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#include "cpu/ozone/rename_table.hh"
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@@ -31,7 +31,7 @@
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#ifndef __CPU_OZONE_THREAD_STATE_HH__
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#define __CPU_OZONE_THREAD_STATE_HH__
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#include "arch/faults.hh"
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#include "sim/faults.hh"
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#include "arch/types.hh"
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#include "arch/regfile.hh"
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#include "base/callback.hh"
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@@ -188,8 +188,11 @@ AtomicSimpleCPU::resume()
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changeState(SimObject::Running);
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if (thread->status() == ThreadContext::Active) {
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if (!tickEvent.scheduled())
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tickEvent.schedule(curTick);
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if (!tickEvent.scheduled()) {
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Tick nextTick = curTick + cycles(1) - 1;
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nextTick -= (nextTick % (cycles(1)));
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tickEvent.schedule(nextTick);
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}
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}
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}
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}
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@@ -217,7 +220,9 @@ AtomicSimpleCPU::takeOverFrom(BaseCPU *oldCPU)
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ThreadContext *tc = threadContexts[i];
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if (tc->status() == ThreadContext::Active && _status != Running) {
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_status = Running;
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tickEvent.schedule(curTick);
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Tick nextTick = curTick + cycles(1) - 1;
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nextTick -= (nextTick % (cycles(1)));
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tickEvent.schedule(nextTick);
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break;
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}
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}
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@@ -234,7 +239,10 @@ AtomicSimpleCPU::activateContext(int thread_num, int delay)
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assert(!tickEvent.scheduled());
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notIdleFraction++;
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tickEvent.schedule(curTick + cycles(delay));
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//Make sure ticks are still on multiples of cycles
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Tick nextTick = curTick + cycles(delay + 1) - 1;
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nextTick -= (nextTick % (cycles(1)));
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tickEvent.schedule(nextTick);
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_status = Running;
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}
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@@ -401,13 +401,15 @@ BaseSimpleCPU::preExecute()
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StaticInstPtr instPtr = StaticInst::decode(makeExtMI(inst, thread->getTC()));
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if (instPtr->isMacroOp()) {
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curMacroStaticInst = instPtr;
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curStaticInst = curMacroStaticInst->fetchMicroOp(0);
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curStaticInst = curMacroStaticInst->
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fetchMicroOp(thread->readMicroPC());
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} else {
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curStaticInst = instPtr;
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}
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} else {
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//Read the next micro op from the macro op
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curStaticInst = curMacroStaticInst->fetchMicroOp(thread->readMicroPC());
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curStaticInst = curMacroStaticInst->
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fetchMicroOp(thread->readMicroPC());
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}
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@@ -62,6 +62,8 @@ ThreadState::serialize(std::ostream &os)
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// thread_num and cpu_id are deterministic from the config
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SERIALIZE_SCALAR(funcExeInst);
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SERIALIZE_SCALAR(inst);
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SERIALIZE_SCALAR(microPC);
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SERIALIZE_SCALAR(nextMicroPC);
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#if FULL_SYSTEM
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Tick quiesceEndTick = 0;
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@@ -81,6 +83,8 @@ ThreadState::unserialize(Checkpoint *cp, const std::string §ion)
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// thread_num and cpu_id are deterministic from the config
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UNSERIALIZE_SCALAR(funcExeInst);
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UNSERIALIZE_SCALAR(inst);
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UNSERIALIZE_SCALAR(microPC);
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UNSERIALIZE_SCALAR(nextMicroPC);
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#if FULL_SYSTEM
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Tick quiesceEndTick;
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