Minor updates for stats.
src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch.hh:
Update stats comments.
src/cpu/o3/fetch_impl.hh:
Differentiate stats.
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/inst_queue_impl.hh:
Update for stats.
src/cpu/o3/lsq.hh:
LSQ now has stats.
src/cpu/o3/lsq_impl.hh:
Register stats of all LSQ units.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
Add in stats.
--HG--
extra : convert_revision : 7672ecf3c02515b268c28d5a986af1432197654a
This commit is contained in:
@@ -204,19 +204,6 @@ DefaultCommit<Impl>::regStats()
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.flags(total)
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;
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//
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// Commit-Eligible instructions...
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//
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// -> The number of instructions eligible to commit in those
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// cycles where we reached our commit BW limit (less the number
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// actually committed)
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//
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// -> The average value is computed over ALL CYCLES... not just
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// the BW limited cycles
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//
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// -> The standard deviation is computed only over cycles where
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// we reached the BW limit
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//
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commitEligible
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.init(cpu->number_of_threads)
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.name(name() + ".COM:bw_limited")
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