From 2df04ec897cbb15fa8e58ad767a1a37e295f8014 Mon Sep 17 00:00:00 2001
From: Sandipan Das <sandipan@linux.ibm.com>
Date: Sat, 6 Feb 2021 17:19:32 +0530
Subject: [PATCH] arch-power: Add fields for D and X form instructions

This adds the L field for D and X form instructions that
specifies if a compare instruction should perform 32-bit
or 64-bit comparison of its operands.

Change-Id: I72413a507c93096b1573836197837227c1c1e521
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40911
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---
 src/arch/power/types.hh | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/arch/power/types.hh b/src/arch/power/types.hh
index 6f5582124e..8700222cad 100644
--- a/src/arch/power/types.hh
+++ b/src/arch/power/types.hh
@@ -59,6 +59,9 @@ BitUnion32(ExtMachInst)
     Bitfield<20, 16> d1;
     Bitfield< 1,  0> d2;
 
+    // Compare fields
+    Bitfield<21>     l;
+
     // Special purpose register identifier
     Bitfield<20, 11> spr;
     Bitfield<25, 23> bf;