diff --git a/src/arch/arm/isa/templates/sve_mem.isa b/src/arch/arm/isa/templates/sve_mem.isa
index 8bfb423e32..f635870b06 100644
--- a/src/arch/arm/isa/templates/sve_mem.isa
+++ b/src/arch/arm/isa/templates/sve_mem.isa
@@ -911,6 +911,7 @@ def template SveStructMemSIMicroopDeclare {{
             numRegs(_numRegs), regIndex(_regIndex),
             memAccessFlags(ArmISA::TLB::AllowUnaligned)
         {
+            %(set_reg_idx_arr)s;
             %(constructor)s;
             baseIsSP = isSP(_base);
         }