diff --git a/src/mem/ruby/slicc_interface/RubyRequest.cc b/src/mem/ruby/slicc_interface/RubyRequest.cc
index 3cafabed51..05ed26397a 100644
--- a/src/mem/ruby/slicc_interface/RubyRequest.cc
+++ b/src/mem/ruby/slicc_interface/RubyRequest.cc
@@ -79,8 +79,10 @@ RubyRequest::functionalWrite(Packet *pkt)
     // has to overwrite the data for the timing request, even if the
     // timing request has still not been ordered globally.
 
-    if (!data)
-      return false;
+    if (!pkt->hasData() || !m_pkt->hasData())
+        return false;
+
+    uint8_t *data =  m_pkt->getPtr<uint8_t>();
 
     if (pkt->isMaskedWrite() || m_pkt->isMaskedWrite()) {
         warn("Skiping functional write to/from a masked write packet"
diff --git a/src/mem/ruby/slicc_interface/RubyRequest.hh b/src/mem/ruby/slicc_interface/RubyRequest.hh
index ed8dbbb0a4..14318c7cd9 100644
--- a/src/mem/ruby/slicc_interface/RubyRequest.hh
+++ b/src/mem/ruby/slicc_interface/RubyRequest.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020 ARM Limited
+ * Copyright (c) 2020-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -62,7 +62,6 @@ class RubyRequest : public Message
     RubyAccessMode m_AccessMode;
     int m_Size;
     PrefetchBit m_Prefetch;
-    uint8_t* data;
     PacketPtr m_pkt;
     ContextID m_contextId;
     WriteMask m_writeMask;
@@ -72,7 +71,7 @@ class RubyRequest : public Message
     bool m_htmFromTransaction;
     uint64_t m_htmTransactionUid;
 
-    RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len,
+    RubyRequest(Tick curTime, uint64_t _paddr, int _len,
         uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode,
         PacketPtr _pkt, PrefetchBit _pb = PrefetchBit_No,
         ContextID _proc_id = 100, ContextID _core_id = 99)
@@ -83,7 +82,6 @@ class RubyRequest : public Message
           m_AccessMode(_access_mode),
           m_Size(_len),
           m_Prefetch(_pb),
-          data(_data),
           m_pkt(_pkt),
           m_contextId(_core_id),
           m_htmFromTransaction(false),
@@ -92,7 +90,7 @@ class RubyRequest : public Message
         m_LineAddress = makeLineAddress(m_PhysicalAddress);
     }
 
-    RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len,
+    RubyRequest(Tick curTime, uint64_t _paddr, int _len,
         uint64_t _pc, RubyRequestType _type,
         RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb,
         unsigned _proc_id, unsigned _core_id,
@@ -106,7 +104,6 @@ class RubyRequest : public Message
           m_AccessMode(_access_mode),
           m_Size(_len),
           m_Prefetch(_pb),
-          data(_data),
           m_pkt(_pkt),
           m_contextId(_core_id),
           m_writeMask(_wm_size,_wm_mask),
@@ -119,7 +116,7 @@ class RubyRequest : public Message
         m_LineAddress = makeLineAddress(m_PhysicalAddress);
     }
 
-    RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len,
+    RubyRequest(Tick curTime, uint64_t _paddr, int _len,
         uint64_t _pc, RubyRequestType _type,
         RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb,
         unsigned _proc_id, unsigned _core_id,
@@ -134,7 +131,6 @@ class RubyRequest : public Message
           m_AccessMode(_access_mode),
           m_Size(_len),
           m_Prefetch(_pb),
-          data(_data),
           m_pkt(_pkt),
           m_contextId(_core_id),
           m_writeMask(_wm_size,_wm_mask,_atomicOps),
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 49c03519ab..0a80905c98 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -769,8 +769,6 @@ Sequencer::issueRequest(PacketPtr pkt, RubyRequestType secondary_type)
     // requests do not
     std::shared_ptr<RubyRequest> msg =
         std::make_shared<RubyRequest>(clockEdge(), pkt->getAddr(),
-                                      pkt->isFlush() ?
-                                      nullptr : pkt->getPtr<uint8_t>(),
                                       pkt->getSize(), pc, secondary_type,
                                       RubyAccessMode_Supervisor, pkt,
                                       PrefetchBit_No, proc_id, core_id);
diff --git a/src/mem/ruby/system/VIPERCoalescer.cc b/src/mem/ruby/system/VIPERCoalescer.cc
index ac9d64fba3..d8d2fd9fe3 100644
--- a/src/mem/ruby/system/VIPERCoalescer.cc
+++ b/src/mem/ruby/system/VIPERCoalescer.cc
@@ -150,7 +150,6 @@ VIPERCoalescer::issueRequest(CoalescedRequest* crequest)
     std::shared_ptr<RubyRequest> msg;
     if (pkt->isAtomicOp()) {
         msg = std::make_shared<RubyRequest>(clockEdge(), pkt->getAddr(),
-                              pkt->getPtr<uint8_t>(),
                               pkt->getSize(), pc, crequest->getRubyType(),
                               RubyAccessMode_Supervisor, pkt,
                               PrefetchBit_No, proc_id, 100,
@@ -158,7 +157,6 @@ VIPERCoalescer::issueRequest(CoalescedRequest* crequest)
                               dataBlock, atomicOps, crequest->getSeqNum());
     } else {
         msg = std::make_shared<RubyRequest>(clockEdge(), pkt->getAddr(),
-                              pkt->getPtr<uint8_t>(),
                               pkt->getSize(), pc, crequest->getRubyType(),
                               RubyAccessMode_Supervisor, pkt,
                               PrefetchBit_No, proc_id, 100,
@@ -288,7 +286,7 @@ VIPERCoalescer::invTCP()
         // Evict Read-only data
         RubyRequestType request_type = RubyRequestType_REPLACEMENT;
         std::shared_ptr<RubyRequest> msg = std::make_shared<RubyRequest>(
-            clockEdge(), addr, (uint8_t*) 0, 0, 0,
+            clockEdge(), addr, 0, 0,
             request_type, RubyAccessMode_Supervisor,
             nullptr);
         DPRINTF(GPUCoalescer, "Evicting addr 0x%x\n", addr);