diff --git a/src/arch/arm/freebsd/se_workload.hh b/src/arch/arm/freebsd/se_workload.hh index 8069bd2563..4ec50907dc 100644 --- a/src/arch/arm/freebsd/se_workload.hh +++ b/src/arch/arm/freebsd/se_workload.hh @@ -82,9 +82,6 @@ struct ResultsetCCReg(ArmISA::CCREG_C, 0); diff --git a/src/arch/arm/linux/se_workload.hh b/src/arch/arm/linux/se_workload.hh index b22688fb8e..f0af647251 100644 --- a/src/arch/arm/linux/se_workload.hh +++ b/src/arch/arm/linux/se_workload.hh @@ -74,9 +74,6 @@ struct ResultsetIntReg(ArmISA::ReturnValueReg, ret.encodedValue()); if (ret.count() > 1) tc->setIntReg(ArmISA::SyscallPseudoReturnReg, ret.value2()); diff --git a/src/arch/mips/se_workload.hh b/src/arch/mips/se_workload.hh index 178093d837..c10ceb031a 100644 --- a/src/arch/mips/se_workload.hh +++ b/src/arch/mips/se_workload.hh @@ -77,9 +77,6 @@ struct Result static void store(ThreadContext *tc, const SyscallReturn &ret) { - if (ret.suppressed() || ret.needsRetry()) - return; - if (ret.successful()) { // no error tc->setIntReg(MipsISA::SyscallSuccessReg, 0); diff --git a/src/arch/power/se_workload.hh b/src/arch/power/se_workload.hh index 2b6279529d..c351d6560d 100644 --- a/src/arch/power/se_workload.hh +++ b/src/arch/power/se_workload.hh @@ -77,9 +77,6 @@ struct Result static void store(ThreadContext *tc, const SyscallReturn &ret) { - if (ret.suppressed() || ret.needsRetry()) - return; - PowerISA::Cr cr = tc->readIntReg(PowerISA::INTREG_CR); if (ret.successful()) { cr.cr0.so = 0; diff --git a/src/arch/riscv/se_workload.hh b/src/arch/riscv/se_workload.hh index 1f8a0677b8..484803e3c7 100644 --- a/src/arch/riscv/se_workload.hh +++ b/src/arch/riscv/se_workload.hh @@ -75,9 +75,6 @@ struct Result static void store(ThreadContext *tc, const SyscallReturn &ret) { - if (ret.suppressed() || ret.needsRetry()) - return; - if (ret.successful()) { // no error tc->setIntReg(RiscvISA::ReturnValueReg, ret.returnValue()); diff --git a/src/arch/sparc/se_workload.hh b/src/arch/sparc/se_workload.hh index 6d034f7ced..18988fe66d 100644 --- a/src/arch/sparc/se_workload.hh +++ b/src/arch/sparc/se_workload.hh @@ -89,9 +89,6 @@ struct ResultsetIntReg(X86ISA::INTREG_RAX, ret.encodedValue()); } }; diff --git a/src/sim/syscall_desc.cc b/src/sim/syscall_desc.cc index 74991020b7..7427f41990 100644 --- a/src/sim/syscall_desc.cc +++ b/src/sim/syscall_desc.cc @@ -44,12 +44,14 @@ SyscallDesc::doSyscall(ThreadContext *tc) SyscallReturn retval = executor(this, tc); - if (retval.needsRetry()) + if (retval.needsRetry()) { DPRINTF_SYSCALL(Base, "Needs retry.\n", name()); - else if (retval.suppressed()) + } else if (retval.suppressed()) { DPRINTF_SYSCALL(Base, "No return value.\n", name()); - else + } else { + returnInto(tc, retval); DPRINTF_SYSCALL(Base, "Returned %d.\n", retval.encodedValue()); + } } } // namespace gem5 diff --git a/src/sim/syscall_desc.hh b/src/sim/syscall_desc.hh index 0740632705..6ded904097 100644 --- a/src/sim/syscall_desc.hh +++ b/src/sim/syscall_desc.hh @@ -141,7 +141,7 @@ class SyscallDescABI : public SyscallDesc // Use invokeSimcall to gather the other arguments based on the // given ABI and pass them to the syscall implementation. - return invokeSimcall(tc, + return invokeSimcall(tc, std::function( partial)); };