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misc: Run pre-commit run on all files in repo

Browse Source 
The following command was run:

```
pre-commit run --all-files
```

This ensures all the files in the repository are formatted to pass our
checks.

Change-Id: Ia2fe3529a50ad925d1076a612d60a4280adc40de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62572
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Bobby R. Bruce
2022-08-22 12:34:19 -07:00
committed by Bobby Bruce
parent 64add0e04d
commit 2bc5a8b71a
181 changed files with 1445 additions and 1229 deletions
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35
util/cpt_upgraders/register-files.py
View File

@@ -1,10 +1,10 @@
# Rename register files to their new systematic names.
def upgrader(cpt):
is_arm = cpt.get('root', 'isa', fallback='') == 'arm'
is_arm = cpt.get("root", "isa", fallback="") == "arm"
import re
is_cpu = lambda sec: 'intRegs' in cpt[sec]
is_cpu = lambda sec: "intRegs" in cpt[sec]
cpu_sections = filter(is_cpu, cpt.sections())
for sec in cpu_sections:
@@ -19,14 +19,14 @@ def upgrader(cpt):
byte_mask = (0x1 << byte_bits) - 1
# If there's vecRegs, create regs.vector_element from it.
vec_regs = items.get('vecRegs')
vec_regs = items.get("vecRegs")
if vec_regs is not None:
reg_vals = vec_regs.split()
if is_arm:
full_bits = arm_vec_bits
else:
full_bits = regval_bits
reg_vals = ['0']
reg_vals = ["0"]
elem_bits = 32
elem_mask = (0x1 << elem_bits) - 1
@@ -41,40 +41,41 @@ def upgrader(cpt):
# Treat the element as a RegVal value, even if it's
# fewer bits in the vector registers.
for chunk in range(regval_bits // byte_bits):
bytes.append(f'{elem & byte_mask}')
bytes.append(f"{elem & byte_mask}")
elem = elem >> byte_bits
items['regs.vector_element'] = ' '.join(bytes)
items["regs.vector_element"] = " ".join(bytes)
name_map = {
'floatRegs.i': 'regs.floating_point',
'vecRegs': 'regs.vector',
'vecPredRegs': 'regs.vector_predicate',
'intRegs': 'regs.integer',
'ccRegs': 'regs.condition_code',
"floatRegs.i": "regs.floating_point",
"vecRegs": "regs.vector",
"vecPredRegs": "regs.vector_predicate",
"intRegs": "regs.integer",
"ccRegs": "regs.condition_code",
}
for old, new in name_map.items():
if old in items:
if is_arm and old in ('vecRegs', 'vecPredRegs'):
if is_arm and old in ("vecRegs", "vecPredRegs"):
reg_bits = 2048
else:
reg_bits = regval_bits
reg_vals = items[old].split()
if not is_arm and old in ('vecRegs', 'vecPredRegs'):
reg_vals = ['0']
if not is_arm and old in ("vecRegs", "vecPredRegs"):
reg_vals = ["0"]
bytes = []
for reg in reg_vals:
reg = int(reg)
for chunk in range(reg_bits // byte_bits):
bytes.append(f'{reg & byte_mask}')
bytes.append(f"{reg & byte_mask}")
reg = reg >> byte_bits
items[new] = ' '.join(bytes)
items[new] = " ".join(bytes)
del items[old]
items.setdefault('regs.condition_code', '')
items.setdefault("regs.condition_code", "")
legacy_version = 16