misc,python: Run pre-commit run --all-files
Applies the `pyupgrade` hook to all files in the repo. Change-Id: I9879c634a65c5fcaa9567c63bc5977ff97d5d3bf
This commit is contained in:
@@ -521,7 +521,7 @@ def cxxMethod(*args, **kwargs):
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# This class holds information about each simobject parameter
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# that should be displayed on the command line for use in the
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# configuration system.
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class ParamInfo(object):
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class ParamInfo:
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def __init__(self, type, desc, type_str, example, default_val, access_str):
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self.type = type
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self.desc = desc
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@@ -546,7 +546,7 @@ class SimObjectCliWrapperException(Exception):
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super().__init__(message)
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class SimObjectCliWrapper(object):
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class SimObjectCliWrapper:
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"""
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Wrapper class to restrict operations that may be done
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from the command line on SimObjects.
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@@ -609,7 +609,7 @@ class SimObjectCliWrapper(object):
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# The SimObject class is the root of the special hierarchy. Most of
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# the code in this class deals with the configuration hierarchy itself
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# (parent/child node relationships).
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class SimObject(object, metaclass=MetaSimObject):
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class SimObject(metaclass=MetaSimObject):
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# Specify metaclass. Any class inheriting from SimObject will
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# get this metaclass.
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type = "SimObject"
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@@ -874,7 +874,7 @@ class SimObject(object, metaclass=MetaSimObject):
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hr_value = value
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value = param.convert(value)
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except Exception as e:
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msg = "%s\nError setting param %s.%s to %s\n" % (
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msg = "{}\nError setting param {}.{} to {}\n".format(
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e,
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self.__class__.__name__,
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attr,
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@@ -1253,8 +1253,7 @@ class SimObject(object, metaclass=MetaSimObject):
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# it based on the key (name) to ensure the order is the same
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# on all hosts
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for name, child in sorted(self._children.items()):
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for obj in child.descendants():
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yield obj
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yield from child.descendants()
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# Call C++ to create C++ object corresponding to this object
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def createCCObject(self):
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@@ -1287,8 +1286,7 @@ class SimObject(object, metaclass=MetaSimObject):
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def recurseDeviceTree(self, state):
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for child in self._children.values():
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for item in child: # For looping over SimObjectVectors
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for dt in item.generateDeviceTree(state):
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yield dt
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yield from item.generateDeviceTree(state)
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# On a separate method otherwise certain buggy Python versions
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# would fail with: SyntaxError: unqualified exec is not allowed
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@@ -113,7 +113,7 @@ gem5_citations = """@article{Binkert:2011:gem5,
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Mohammad Alian and
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Rico Amslinger and
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Matteo Andreozzi and
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Adri{\`{a}} Armejach and
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Adri{\\`{a}} Armejach and
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Nils Asmussen and
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Srikant Bharadwaj and
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Gabe Black and
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@@ -513,7 +513,7 @@ def main():
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if os.name == "nt" and os.sep == "\\":
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# If a Windows machine, we manually quote the string.
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arg = arg.replace('"', '\\"')
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if re.search("\s", args):
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if re.search(r"\s", args):
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# We quote args which have whitespace.
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arg = '"' + arg + '"'
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return arg
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@@ -615,7 +615,7 @@ def main():
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if not options.P:
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sys.path = [os.path.dirname(sys.argv[0])] + sys.path
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filename = sys.argv[0]
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filedata = open(filename, "r").read()
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filedata = open(filename).read()
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filecode = compile(filedata, filename, "exec")
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scope = {"__file__": filename, "__name__": "__m5_main__"}
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@@ -30,11 +30,11 @@ import sys
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from optparse import *
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class nodefault(object):
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class nodefault:
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pass
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class splitter(object):
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class splitter:
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def __init__(self, split):
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self.split = split
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@@ -101,7 +101,7 @@ class MetaParamValue(type):
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# Dummy base class to identify types that are legitimate for SimObject
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# parameters.
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class ParamValue(object, metaclass=MetaParamValue):
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class ParamValue(metaclass=MetaParamValue):
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cmd_line_settable = False
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# Generate the code needed as a prerequisite for declaring a C++
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@@ -149,7 +149,7 @@ class ParamValue(object, metaclass=MetaParamValue):
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# Regular parameter description.
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class ParamDesc(object):
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class ParamDesc:
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def __init__(self, ptype_str, ptype, *args, **kwargs):
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self.ptype_str = ptype_str
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# remember ptype only if it is provided
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@@ -298,8 +298,7 @@ class SimObjectVector(VectorParamValue):
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# SimObjectVector directly.
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def descendants(self):
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for v in self:
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for obj in v.descendants():
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yield obj
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yield from v.descendants()
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def get_config_as_dict(self):
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a = []
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@@ -415,7 +414,7 @@ class VectorParamDesc(ParamDesc):
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code("std::vector< ${{self.ptype.cxx_type}} > ${{self.name}};")
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class ParamFactory(object):
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class ParamFactory:
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def __init__(self, param_desc_class, ptype_str=None):
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self.param_desc_class = param_desc_class
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self.ptype_str = ptype_str
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@@ -966,7 +965,7 @@ class AddrRange(ParamValue):
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if len(self.masks) == 0:
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return f"{self.start}:{self.end}"
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else:
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return "%s:%s:%s:%s" % (
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return "{}:{}:{}:{}".format(
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self.start,
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self.end,
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self.intlvMatch,
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@@ -1602,7 +1601,7 @@ class Enum(ParamValue, metaclass=MetaEnum):
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def cxx_ini_parse(cls, code, src, dest, ret):
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code("if (false) {")
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for elem_name in cls.map.keys():
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code('} else if (%s == "%s") {' % (src, elem_name))
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code(f'}} else if ({src} == "{elem_name}") {{')
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code.indent()
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name = cls.__name__ if cls.enum_name is None else cls.enum_name
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code(f"{dest} = {name if cls.is_class else 'enums'}::{elem_name};")
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@@ -1970,7 +1969,7 @@ class MemoryBandwidth(float, ParamValue):
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# make_param_value() above that lets these be assigned where a
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# SimObject is required.
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# only one copy of a particular node
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class NullSimObject(object, metaclass=Singleton):
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class NullSimObject(metaclass=Singleton):
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_name = "Null"
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def __call__(cls):
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@@ -2036,7 +2035,7 @@ AllMemory = AddrRange(0, MaxAddr)
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# Port reference: encapsulates a reference to a particular port on a
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# particular SimObject.
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class PortRef(object):
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class PortRef:
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def __init__(self, simobj, name, role, is_source):
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assert isSimObject(simobj) or isSimObjectClass(simobj)
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self.simobj = simobj
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@@ -2206,7 +2205,7 @@ class VectorPortElementRef(PortRef):
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# A reference to a complete vector-valued port (not just a single element).
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# Can be indexed to retrieve individual VectorPortElementRef instances.
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class VectorPortRef(object):
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class VectorPortRef:
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def __init__(self, simobj, name, role, is_source):
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assert isSimObject(simobj) or isSimObjectClass(simobj)
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self.simobj = simobj
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@@ -2288,7 +2287,7 @@ class VectorPortRef(object):
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# Port description object. Like a ParamDesc object, this represents a
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# logical port in the SimObject class, not a particular port on a
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# SimObject instance. The latter are represented by PortRef objects.
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class Port(object):
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class Port:
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# Port("role", "description")
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_compat_dict = {}
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@@ -2379,12 +2378,12 @@ VectorSlavePort = VectorResponsePort
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# 'Fake' ParamDesc for Port references to assign to the _pdesc slot of
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# proxy objects (via set_param_desc()) so that proxy error messages
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# make sense.
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class PortParamDesc(object, metaclass=Singleton):
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class PortParamDesc(metaclass=Singleton):
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ptype_str = "Port"
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ptype = Port
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class DeprecatedParam(object):
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class DeprecatedParam:
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"""A special type for deprecated parameter variable names.
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There are times when we need to change the name of parameter, but this
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@@ -45,7 +45,7 @@
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import copy
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class BaseProxy(object):
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class BaseProxy:
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def __init__(self, search_self, search_up):
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self._search_self = search_self
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self._search_up = search_up
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@@ -272,7 +272,7 @@ def isproxy(obj):
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return False
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class ProxyFactory(object):
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class ProxyFactory:
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def __init__(self, search_self, search_up):
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self.search_self = search_self
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self.search_up = search_up
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@@ -82,7 +82,7 @@ def dot_create_nodes(simNode, callgraph):
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label = "root"
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else:
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label = simNode._name
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full_path = re.sub("\.", "_", simNode.path())
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full_path = re.sub(r"\.", "_", simNode.path())
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# add class name under the label
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label = '"' + label + " \\n: " + simNode.__class__.__name__ + '"'
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@@ -109,7 +109,7 @@ def dot_create_edges(simNode, callgraph):
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for port_name in simNode._ports.keys():
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port = simNode._port_refs.get(port_name, None)
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if port != None:
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full_path = re.sub("\.", "_", simNode.path())
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full_path = re.sub(r"\.", "_", simNode.path())
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full_port_name = full_path + "_" + port_name
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port_node = dot_create_node(simNode, full_port_name, port_name)
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# create edges
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@@ -128,7 +128,7 @@ def dot_create_edges(simNode, callgraph):
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def dot_add_edge(simNode, callgraph, full_port_name, port):
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peer = port.peer
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full_peer_path = re.sub("\.", "_", peer.simobj.path())
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full_peer_path = re.sub(r"\.", "_", peer.simobj.path())
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full_peer_port_name = full_peer_path + "_" + peer.name
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# Each edge is encountered twice, once for each peer. We only want one
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@@ -290,9 +290,9 @@ def dot_rgb_to_html(r, g, b):
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# We need to create all of the clock domains. We abuse the alpha channel to get
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# the correct domain colouring.
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def dot_add_clk_domain(c_dom, v_dom):
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label = '"' + str(c_dom) + "\ :\ " + str(v_dom) + '"'
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label = re.sub("\.", "_", str(label))
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full_path = re.sub("\.", "_", str(c_dom))
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label = '"' + str(c_dom) + r"\ :\ " + str(v_dom) + '"'
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label = re.sub(r"\.", "_", str(label))
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full_path = re.sub(r"\.", "_", str(c_dom))
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return pydot.Cluster(
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full_path,
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shape="box",
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@@ -311,7 +311,7 @@ def dot_create_dvfs_nodes(simNode, callgraph, domain=None):
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label = "root"
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else:
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label = simNode._name
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full_path = re.sub("\.", "_", simNode.path())
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full_path = re.sub(r"\.", "_", simNode.path())
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# add class name under the label
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label = '"' + label + " \\n: " + simNode.__class__.__name__ + '"'
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@@ -86,7 +86,7 @@ class FdtPropertyBytes(pyfdt.FdtPropertyBytes):
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super().__init__(name, values)
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class FdtState(object):
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class FdtState:
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"""Class for maintaining state while recursively generating a flattened
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device tree. The state tracks address, size and CPU address cell sizes, and
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maintains a dictionary of allocated phandles."""
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@@ -270,7 +270,7 @@ class Fdt(pyfdt.Fdt):
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with open(filename, "wb") as f:
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f.write(self.to_dtb())
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return filename
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except IOError:
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except OSError:
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raise RuntimeError("Failed to open DTB output file")
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def writeDtsFile(self, filename):
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@@ -280,5 +280,5 @@ class Fdt(pyfdt.Fdt):
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with open(filename, "w") as f:
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f.write(self.to_dts())
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return filename
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except IOError:
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except OSError:
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raise RuntimeError("Failed to open DTS output file")
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@@ -27,7 +27,7 @@
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__all__ = ["multidict"]
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class multidict(object):
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class multidict:
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def __init__(self, parent={}, **kwargs):
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self.local = dict(**kwargs)
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self.parent = parent
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@@ -80,8 +80,7 @@ class multidict(object):
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return key in self
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def items(self):
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for item in self.next():
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yield item
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yield from self.next()
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def keys(self):
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for key, value in self.next():
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@@ -36,7 +36,7 @@
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from abc import *
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class PyBindExport(object, metaclass=ABCMeta):
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class PyBindExport(metaclass=ABCMeta):
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@abstractmethod
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def export(self, code, cname):
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pass
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@@ -84,7 +84,7 @@ except:
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cap_string = null_cap_string
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class ColorStrings(object):
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class ColorStrings:
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def __init__(self, cap_string):
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for i, c in enumerate(color_names):
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setattr(self, c, cap_string("setaf", i))
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