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misc: Add missing RISCV valid ISA option to README.md (#462)

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The list of valid ISA options should be same as the website:
https://www.gem5.org/documentation/general_docs/building

Change-Id: Id5ace5b0356ec35634caec5b11159551801c0615
This commit is contained in:
Yu-Cheng Chang
2023-10-17 00:45:28 +08:00
committed by GitHub
parent 9b2b6cd8d2
commit 2825bc1d55
1 changed files with 2 additions and 2 deletions
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README.md
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@@ -38,8 +38,8 @@ Once you have all dependencies resolved, execute
`scons build/ALL/gem5.opt` to build an optimized version of the gem5 binary `scons build/ALL/gem5.opt` to build an optimized version of the gem5 binary
(`gem5.opt`) containing all gem5 ISAs. If you only wish to compile gem5 to (`gem5.opt`) containing all gem5 ISAs. If you only wish to compile gem5 to
include a single ISA, you can replace `ALL` with the name of the ISA. Valid include a single ISA, you can replace `ALL` with the name of the ISA. Valid
options include `ARM`, `NULL`, `MIPS`, `POWER`, `SPARC`, and `X86` The complete options include `ARM`, `NULL`, `MIPS`, `POWER`, `RISCV`, `SPARC`, and `X86`
list of options can be found in the build_opts directory. The complete list of options can be found in the build_opts directory.
See https://www.gem5.org/documentation/general_docs/building for more See https://www.gem5.org/documentation/general_docs/building for more
information on building gem5. information on building gem5.