cpu: Switch off of the CPU's comInstEventQueue.

This switches to letting the ThreadContexts use a thread based/local
comInstEventQueue instead of falling back to the CPU's array. Because
the implementation is no longer shared and it's not given where the
comInstEventQueue (or other implementation) should be accessed, the
default implementation has been removed.

Also, because nobody is using the CPU's array of event queues, those
have been removed.

Change-Id: I515e6e00a2174067a928c33ef832bc5c840bdf7f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22110
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2019-10-13 23:40:04 -07:00
parent a2a8dac5c2
commit 272a43175f
10 changed files with 106 additions and 61 deletions

View File

@@ -77,8 +77,9 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
Process *_process, BaseTLB *_itb,
BaseTLB *_dtb, TheISA::ISA *_isa)
: ThreadState(_cpu, _thread_num, _process), isa(_isa),
predicate(true), memAccPredicate(true), system(_sys),
itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(_isa))
predicate(true), memAccPredicate(true),
comInstEventQueue("instruction-based event queue"),
system(_sys), itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(_isa))
{
clearArchRegs();
quiesceEvent = new EndQuiesceEvent(this);
@@ -88,8 +89,9 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
BaseTLB *_itb, BaseTLB *_dtb,
TheISA::ISA *_isa, bool use_kernel_stats)
: ThreadState(_cpu, _thread_num, NULL), isa(_isa),
predicate(true), memAccPredicate(true), system(_sys),
itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(_isa))
predicate(true), memAccPredicate(true),
comInstEventQueue("instruction-based event queue"),
system(_sys), itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(_isa))
{
quiesceEvent = new EndQuiesceEvent(this);