Add quiesceNs, quiesceTime, quiesceCycles, and m5panic pseudo ops.

This changeset removes a check that prevents quiescing when an
interrupt is pending. *** You should only call quiesce if that
isn't a problem. ***

arch/alpha/isa/decoder.isa:
sim/pseudo_inst.cc:
sim/pseudo_inst.hh:
    Add quiesceNs, quiesceCycles, quisceTime and m5panic pseudo ops.
    These quiesce for a number of ns, cycles, report how long
    we were quiesced for, and panic the simulator respectively.
    The latter is added to the panic() function in the console and linux
    kernel instead of executing an infinite loop until someone notices.
cpu/exec_context.cc:
cpu/exec_context.hh:
    Add a quiesce end event to the execution contexted which upon
    executing wakes up a CPU for quiesceCycles/quiesceNs.
util/m5/Makefile:
    Make the makefile more reasonable
util/m5/m5.c:
    update the m5op executable to use the files from the linux tree
util/m5/m5op.S:
    update m5op.S from linux tree
util/m5/m5op.h:
    update m5op.h from linux tree

--HG--
rename : util/m5/m5op.s => util/m5/m5op.S
extra : convert_revision : 3be18525e811405b112e33f24a8c4e772d15462d

sim/pseudo_inst.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * Copyright (c) 2003-2006 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -77,6 +77,42 @@ namespace AlphaPseudo
         xc->kernelStats->quiesce();
     }
 
+    void
+    quiesceNs(ExecContext *xc, uint64_t ns)
+    {
+        if (!doQuiesce || ns == 0)
+            return;
+
+        if (xc->quiesceEvent.scheduled())
+            xc->quiesceEvent.reschedule(curTick + Clock::Int::ns * ns);
+        else
+            xc->quiesceEvent.schedule(curTick + Clock::Int::ns * ns);
+
+        xc->suspend();
+        xc->kernelStats->quiesce();
+    }
+
+    void
+    quiesceCycles(ExecContext *xc, uint64_t cycles)
+    {
+        if (!doQuiesce || cycles == 0)
+            return;
+
+        if (xc->quiesceEvent.scheduled())
+            xc->quiesceEvent.reschedule(curTick + xc->cpu->cycles(cycles));
+        else
+            xc->quiesceEvent.schedule(curTick + xc->cpu->cycles(cycles));
+
+        xc->suspend();
+        xc->kernelStats->quiesce();
+    }
+
+    uint64_t
+    quiesceTime(ExecContext *xc)
+    {
+        return (xc->lastActivate - xc->lastSuspend) / Clock::Int::ns ;
+    }
+
     void
     ivlb(ExecContext *xc)
     {

sim/pseudo_inst.hh

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * Copyright (c) 2003-2006 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,6 +44,9 @@ namespace AlphaPseudo
 
     void arm(ExecContext *xc);
     void quiesce(ExecContext *xc);
+    void quiesceNs(ExecContext *xc, uint64_t ns);
+    void quiesceCycles(ExecContext *xc, uint64_t cycles);
+    uint64_t quiesceTime(ExecContext *xc);
     void ivlb(ExecContext *xc);
     void ivle(ExecContext *xc);
     void m5exit(ExecContext *xc, Tick delay);