From 25b4defa6aff3873e283c54615cda214786b5db7 Mon Sep 17 00:00:00 2001
From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Mon, 19 Dec 2022 16:00:34 +0000
Subject: [PATCH] util: Fix missing include of sim/core.hh in util-tlm

Change-Id: I6dbf71dac903a660369bf8b33ae0c88d28d07457
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66852
Reviewed-by: Matthias Jung <jungma@eit.uni-kl.de>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
---
 util/tlm/src/sc_master_port.cc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/util/tlm/src/sc_master_port.cc b/util/tlm/src/sc_master_port.cc
index 2e1082818c..c0bb6d5f5f 100644
--- a/util/tlm/src/sc_master_port.cc
+++ b/util/tlm/src/sc_master_port.cc
@@ -36,6 +36,7 @@
 #include "params/ExternalMaster.hh"
 #include "sc_ext.hh"
 #include "sc_master_port.hh"
+#include "sim/core.hh"
 #include "sim/system.hh"
 
 namespace Gem5SystemC