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IDE: Fix issues with new PIIX kernel driver and our model.

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The driver can read the IDE config register as a 32 bit register since
some adapters use bit 18 as a disable channel bit. If the size isn't
set in a PRD it should be 64K according to the SPEC (and driver) not
128K.
This commit is contained in:
Ali Saidi
2011-08-19 15:08:08 -05:00
parent 999cd8aef5
commit 243223ae63
3 changed files with 27 additions and 8 deletions
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11
src/dev/ide_ctrl.cc
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@@ -211,7 +211,10 @@ IdeController::readConfig(PacketPtr pkt)
(uint32_t)pkt->get<uint16_t>());
break;
case sizeof(uint32_t):
panic("No 32bit reads implemented for this device.");
if (offset == IDEConfig)
pkt->set<uint32_t>(ideConfig);
else
panic("No 32bit reads implemented for this device.");
DPRINTF(IdeCtrl, "PCI read offset: %#x size: 4 data: %#x\n", offset,
(uint32_t)pkt->get<uint32_t>());
break;
@@ -275,7 +278,10 @@ IdeController::writeConfig(PacketPtr pkt)
offset, (uint32_t)pkt->get<uint16_t>());
break;
case sizeof(uint32_t):
panic("Write of unimplemented PCI config. register: %x\n", offset);
if (offset == IDEConfig)
ideConfig = pkt->get<uint32_t>();
else
panic("Write of unimplemented PCI config. register: %x\n", offset);
break;
default:
panic("invalid access size(?) for PCI configspace!\n");
@@ -312,6 +318,7 @@ IdeController::writeConfig(PacketPtr pkt)
break;
case PCI_COMMAND:
DPRINTF(IdeCtrl, "Writing to PCI Command val: %#x\n", config.command);
ioEnabled = (config.command & htole(PCI_CMD_IOSE));
bmEnabled = (config.command & htole(PCI_CMD_BME));
break;