Merger

cpu/simple_cpu/simple_cpu.hh:
    Merge

--HG--
extra : convert_revision : 1b6003ac731051fefacb7d7a30c317553b4bf1bc

cpu/base_cpu.cc

@@ -77,7 +77,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
         maxThreadsPerCPU = number_of_threads;
 
     // allocate per-thread instruction-based event queues
-    comInstEventQueue = new (EventQueue *)[number_of_threads];
+    comInstEventQueue = new EventQueue *[number_of_threads];
     for (int i = 0; i < number_of_threads; ++i)
         comInstEventQueue[i] = new EventQueue("instruction-based event queue");
 
@@ -102,7 +102,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
     }
 
     // allocate per-thread load-based event queues
-    comLoadEventQueue = new (EventQueue *)[number_of_threads];
+    comLoadEventQueue = new EventQueue *[number_of_threads];
     for (int i = 0; i < number_of_threads; ++i)
         comLoadEventQueue[i] = new EventQueue("load-based event queue");
 

cpu/simple_cpu/simple_cpu.cc

@@ -75,6 +75,7 @@
 
 using namespace std;
 
+
 SimpleCPU::TickEvent::TickEvent(SimpleCPU *c)
     : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c), multiplier(1)
 {

cpu/simple_cpu/simple_cpu.hh

@@ -26,8 +26,8 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef __SIMPLE_CPU_HH__
-#define __SIMPLE_CPU_HH__
+#ifndef __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
+#define __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
 
 #include "base/statistics.hh"
 #include "cpu/base_cpu.hh"
@@ -103,12 +103,6 @@ class SimpleCPU : public BaseCPU
 
   private:
     Trace::InstRecord *traceData;
-    template<typename T>
-    void trace_data(T data) {
-      if (traceData) {
-        traceData->setData(data);
-      }
-    };
 
   public:
     //
@@ -258,6 +252,11 @@ class SimpleCPU : public BaseCPU
     template <class T>
     Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
 
+    // These functions are only used in CPU models that split
+    // effective address computation from the actual memory access.
+    void setEA(Addr EA) { panic("SimpleCPU::setEA() not implemented\n"); }
+    Addr getEA() 	{ panic("SimpleCPU::getEA() not implemented\n"); }
+
     void prefetch(Addr addr, unsigned flags)
     {
         // need to do this...
@@ -355,4 +354,4 @@ class SimpleCPU : public BaseCPU
     ExecContext *xcBase() { return xc; }
 };
 
-#endif // __SIMPLE_CPU_HH__
+#endif // __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__

cpu/static_inst.cc

@@ -85,4 +85,4 @@ StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt)
 
 
 // force instantiation of template function(s) above
-template StaticInst<AlphaISA>;
+template class StaticInst<AlphaISA>;

cpu/static_inst.hh

@@ -456,7 +456,7 @@ class StaticInstPtr : public RefCountingPtr<StaticInst<ISA> >
     /// Convert to pointer to StaticInstBase class.
     operator const StaticInstBasePtr()
     {
-        return get();
+        return this->get();
     }
 };