From 369029d2bef44d2900a9206c6384b19b33f92379 Mon Sep 17 00:00:00 2001 From: Hoa Nguyen Date: Thu, 25 Apr 2024 02:00:58 +0000 Subject: [PATCH 1/2] cpu: Add IsInvalid flag to StaticInstFlags The IsInvalid flag indicates that the static instruction is not part of the executing ISA and not part of m5's pseudo-instructions. This flag provides a way to recognize an illegal instruction at the decode stage. Change-Id: I2779c6edcd8c5e6a77ea11cad3ff73bacb79d800 Signed-off-by: Hoa Nguyen --- src/cpu/StaticInstFlags.py | 1 + src/cpu/static_inst.hh | 2 ++ 2 files changed, 3 insertions(+) diff --git a/src/cpu/StaticInstFlags.py b/src/cpu/StaticInstFlags.py index 4ab6cc499c..2e02833d1a 100644 --- a/src/cpu/StaticInstFlags.py +++ b/src/cpu/StaticInstFlags.py @@ -99,4 +99,5 @@ class StaticInstFlags(Enum): "IsHtmStart", # Starts a HTM transaction "IsHtmStop", # Stops (commits) a HTM transaction "IsHtmCancel", # Explicitely aborts a HTM transaction + "IsInvalid", # An invalid instruction ] diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index 12b05f9b0e..78e47f4ed8 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -196,6 +196,8 @@ class StaticInst : public RefCounted, public StaticInstFlags bool isHtmStop() const { return flags[IsHtmStop]; } bool isHtmCancel() const { return flags[IsHtmCancel]; } + bool isInvalid() const { return flags[IsInvalid]; } + bool isHtmCmd() const { From d528a6bd2d8afac7a143c7e72ed896b237b123c3 Mon Sep 17 00:00:00 2001 From: Hoa Nguyen Date: Thu, 25 Apr 2024 05:50:30 +0000 Subject: [PATCH 2/2] arch: Flag all ISAs Unknown instruction as IsInvalid Change-Id: I096138a157c4e2063c5f4f4324c21c1463dddb65 Signed-off-by: Hoa Nguyen --- src/arch/arm/isa/insts/misc.isa | 3 ++- src/arch/arm/isa/insts/misc64.isa | 2 +- src/arch/mips/isa/formats/unknown.isa | 1 + src/arch/power/isa/formats/unknown.isa | 1 + src/arch/riscv/insts/unknown.hh | 4 +++- src/arch/sparc/insts/unknown.hh | 4 +++- src/arch/x86/isa/formats/unknown.isa | 1 + 7 files changed, 12 insertions(+), 4 deletions(-) diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index 9ee753e385..35b310ecb9 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -848,7 +848,8 @@ let {{ ''' unknownIop = ArmInstObjParams("unknown", "Unknown", "UnknownOp", \ { "code": unknownCode, - "predicate_test": predicateTest }) + "predicate_test": predicateTest }, + ['IsInvalid']) header_output += BasicDeclare.subst(unknownIop) decoder_output += BasicConstructor.subst(unknownIop) exec_output += PredOpExecute.subst(unknownIop) diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa index 5678195415..266467e9d8 100644 --- a/src/arch/arm/isa/insts/misc64.isa +++ b/src/arch/arm/isa/insts/misc64.isa @@ -183,7 +183,7 @@ let {{ return std::make_shared(machInst, true); ''' unknown64Iop = ArmInstObjParams("unknown", "Unknown64", "UnknownOp64", - unknownCode) + unknownCode, ['IsInvalid']) header_output += BasicDeclare.subst(unknown64Iop) decoder_output += BasicConstructor64.subst(unknown64Iop) exec_output += BasicExecute.subst(unknown64Iop) diff --git a/src/arch/mips/isa/formats/unknown.isa b/src/arch/mips/isa/formats/unknown.isa index 8d3ccdfef1..782b4e1595 100644 --- a/src/arch/mips/isa/formats/unknown.isa +++ b/src/arch/mips/isa/formats/unknown.isa @@ -47,6 +47,7 @@ output header {{ // don't call execute() (which panics) if we're on a // speculative path flags[IsNonSpeculative] = true; + flags[IsInvalid] = true; } Fault execute(ExecContext *, trace::InstRecord *) const override; diff --git a/src/arch/power/isa/formats/unknown.isa b/src/arch/power/isa/formats/unknown.isa index 85dacc5796..78eac5ca8b 100644 --- a/src/arch/power/isa/formats/unknown.isa +++ b/src/arch/power/isa/formats/unknown.isa @@ -49,6 +49,7 @@ output header {{ // don't call execute() (which panics) if we're on a // speculative path flags[IsNonSpeculative] = true; + flags[IsInvalid] = true; } Fault execute(ExecContext *, trace::InstRecord *) const override; diff --git a/src/arch/riscv/insts/unknown.hh b/src/arch/riscv/insts/unknown.hh index 64f94dea00..ca90c453f5 100644 --- a/src/arch/riscv/insts/unknown.hh +++ b/src/arch/riscv/insts/unknown.hh @@ -54,7 +54,9 @@ class Unknown : public RiscvStaticInst public: Unknown(ExtMachInst _machInst) : RiscvStaticInst("unknown", _machInst, No_OpClass) - {} + { + flags[IsInvalid] = true; + } Fault execute(ExecContext *, trace::InstRecord *) const override diff --git a/src/arch/sparc/insts/unknown.hh b/src/arch/sparc/insts/unknown.hh index f4bb143198..f5e4b70d43 100644 --- a/src/arch/sparc/insts/unknown.hh +++ b/src/arch/sparc/insts/unknown.hh @@ -47,7 +47,9 @@ class Unknown : public SparcStaticInst // Constructor Unknown(ExtMachInst _machInst) : SparcStaticInst("unknown", _machInst, No_OpClass) - {} + { + flags[IsInvalid] = true; + } Fault execute(ExecContext *, trace::InstRecord *) const override diff --git a/src/arch/x86/isa/formats/unknown.isa b/src/arch/x86/isa/formats/unknown.isa index eca297bab2..d7bca54cd1 100644 --- a/src/arch/x86/isa/formats/unknown.isa +++ b/src/arch/x86/isa/formats/unknown.isa @@ -53,6 +53,7 @@ output header {{ Unknown(ExtMachInst _machInst) : X86ISA::X86StaticInst("unknown", _machInst, No_OpClass) { + flags[IsInvalid] = true; } Fault execute(ExecContext *, trace::InstRecord *) const override;